EMC12 ETC2 [List of Unclassifed Manufacturers], EMC12 Datasheet - Page 14

• Manufacturer Part Number: EMC12
• Description: Audio Interface for the EmPack System
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

EMC12 Hardware Reference Manual
1.2.2.3 PIO Read/Write
The PIO_RD-, PIO_WR- and address decoding are used by the FPGA to generate appropriate read,
write and enable signals to the DSPs, the FIFOs and internal registers. As soon as the board is selected
(PIO_CS- low and MODID matches PIO_A[18-21]), PIO_WAIT- is asserted. When the PIO access
is decoded and no additional wait states are needed, the PIO_WAIT- signal is de-asserted, and the
appropriate read/write pulses are generated.
If the PDRW or PDR2W is addressed, then the PDF signal from the corresponding DSP is used to
generate extra wait states, if necessary. A high PDF in a write cycle or a low PDF in a read cycle will
insert extra wait states until the condition goes away. A maximum of 15 wait states are allowed before
the state machine terminates the read/write cycle by releasing the PIO_WAIT- signal, and set the
TIMEOUT bit in the PISR. If the corresponding bit in the PIMR is also set, the PIO_IRQ0- is asserted
(driven low).
1.2.2.4 PIO Interrupt
The mezzanine board can interrupt the base board via the PIO_IRQ0- signal. There are 3 interrupt
sources on the mezzanine each of which has a corresponding bit in the PIMR and PISR. Bits 0 of PISR
reflect the signal levels of the DSP PIF pins. Bit 6 of PISR is set when a FIFO switch has occurred. Bit
7 is set by a PIO timeout.
An interrupt source is enabled when the corresponding bit in the PIMR is set and disabled if the bit is
reset. The contents of PISR and PIMR are bit-wise AND’ed, and the result is OR’ed to generate the
PIO_IRQ0- signal. The PIO_IRQ0- is asserted until all the interrupt sources are either turned off or
disabled. Reading the PIR clears the corresponding DSP interrupt. To clear the FIFO Switch and PIO
Timeout interrupts, set the CLR_FINT and CLR_TINT bits in the BCR1 respectively.
09 Jan 2006
Communication Automation Corporation
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