LM96163C NSC [National Semiconductor], LM96163C Datasheet - Page 7

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LM96163C

Manufacturer Part Number
LM96163C
Description
Manufacturer
NSC [National Semiconductor]
Datasheet

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Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. Charged Device Model
(CDM) simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated assembler) then rapidly being discharged.
Note 5: Thermal resistance junction to ambient when attached to a 2 layer 4"x3" printed circuit board with copper thickness of 2oz. as described in JEDEC
specification EIA/JESD51-3 is 137°C/W. Thermal resistance junction to ambient when attached to a 4 layer 4"x3" printed circuit board with copper thickness 2oz./
1oz./1oz/2oz. and 4 thermal vias as described in JEDEC specification EIA/JESD51-7 is 40.3°C/W.
Note 6: Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.
Note 7: “Typicals” are at T
Note 8: The accuracy of the LM96163 is guaranteed when using a typical thermal diode of an Intel processor on a 45 nm process, as selected in the Remote
Diode Model Select register. See typical performance curve for performance with Intel processor on 65 nm or 90 nm process.
Note 9: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 10: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power
dissipation of the LM96163 and the thermal resistance. See
Note 11: The supply current will not increase substantially with an SMBus transaction.
Note 12: The output rise time is measured from (V
Note 13: The output fall time is measured from (V
Note 14: Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than t
setting SMBDAT and SMBCLK pins to a high impedance state.
Pin #
10
1
2
3
4
5
6
7
8
9
SMBDAT
SMBCLK
A
ALERT
TCRIT
TACH
Label
PWM
= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical design calculations.
GND
V
D+
D-
DD
IH min
IL max
Circuit
+ 0.15 V) to (V
A
B
B
B
A
B
A
A
A
A
- 0.15 V) to (V
(Note 5)
CIRCUIT A
CIRCUIT B
IL max
IH min
for the thermal resistance to be used in the self-heating calculation.
- 0.15 V).
+ 0.15 V).
7
TIMEOUT
Pin ESD Protection Structure Circuits
will reset the LM96163’s SMBus state machine, therefore
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