IP200 ETC [List of Unclassifed Manufacturers], IP200 Datasheet - Page 15

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IP200

Manufacturer Part Number
IP200
Description
Interpolation Circuit for Incremental Measuring Systems
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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6
The IP200 contains 16-bit and 32-bit read registers, as well as 8-bit write registers. The addresses are
assigned separately for the read and write registers. A third address space is reserved for commands.
6.1
6.2
6.3
Address
0x00
0x01
0x03
0x04
0x05
0x07
Address
0x00
0x01
0x02
0x03
0x04
0x07
0x08
0x09
0x0A
Command
0x00
0x01
0x02
D-09116 Chemnitz, Germany
Registers
Zwickauer Straße 227
Read Registers
Write Registers
Commands
GEMAC
Gesellschaft für
Mikroe lektronikanwendung Chemnitz mbH
Description
Measurement Value / Status
Configuration / Status
Interpolation results
Controller Sine
Controller Cosine
Counter Value / Status
Description
Configuration
Configuration
Configuration
SPI-Synchronisation
Configuration IC-Test
Controller Sinus (Gain)
Controller Sinus (Offset)
Controller Cosine (Gain)
Controller Cosine (Offset) COFF
Name
Channel
Reset
Counter
Reset
Controller
Description
The hardware address will be read from pins DP(3:0). Send this command
always as broadcast command!
In multi-channel systems this command must send and executed first after a
global reset!
The parallel counter (register CNT) is reset, the error register is reset.
Note, that the values of trigger hold registers remains unchanged.
The gain-offset-controller will be set to midscale.
Phone:
Fax::
Internet:
Email:
Date: 20.04.04
Name
CFG0
CFG1
ERRMASK
SYNC
TSTCFG
SGAIN
SOFF
CGAIN
+49 371 33 77 - 0
+49 371 33 77 272
www.gemac-chemnitz.de
interpolation@gemac-chemnitz.de
sales@gemac-chemnitz.de
Byte 3
ERRMASK
Page 15 of 30
DPHI
Byte 2
CFG1
MVAL
CNT
Title:
Data Sheet GC-IP200
Name of Document:
43500-DB-2-1-E-IP200.pdf
Byte 1
CFG0
SOFF
COFF
PHI
Byte 0
SGAIN
CGAIN
STAT

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