HCS165DMSR INTERSIL [Intersil Corporation], HCS165DMSR Datasheet

no-image

HCS165DMSR

Manufacturer Part Number
HCS165DMSR
Description
Radiation Hardened Inverting 8-Bit Parallel-Input/Serial Output Shift Register
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS165MS is a Radiation Hardened 8-Bit Paral-
lel-In/Serial-Out Shift Register with complementary serial
outputs and an asynchronous parallel load input.
The HCS165MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS165MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCS165DMSR
HCS165KMSR
HCS165D/Sample
HCS165K/Sample
HCS165HMSR
Bit-Day (Typ)
- Standard Outputs - 10 LSTTL Loads
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
PART NUMBER
10
RAD (Si)/s 20ns Pulse
5 A at VOL, VOH
TEMPERATURE RANGE
12
o
C to +125
RAD (Si)/s
-55
-55
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
8-Bit Parallel-Input/Serial Output Shift Register
C
2
/mg
-9
o
o
C
C
Errors/
240
Pinouts
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
GND
SCREENING LEVEL
CP
Q7
PL
D4
D5
D6
D7
HCS165MS
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
FLATPACK PACKAGE (FLATPACK)
16 LEAD CERAMIC DUAL-IN-LINE
Radiation Hardened Inverting
16 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
CP
Q7
PL
D4
D5
D6
D7
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
TOP VIEW
TOP VIEW
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
Spec Number
9
File Number
PACKAGE
VCC
CE
D3
D2
D1
D0
DS
Q7
VCC
CE
D3
D2
D1
D0
DS
Q7
518757
2481.2

Related parts for HCS165DMSR

HCS165DMSR Summary of contents

Page 1

... CMOS/SOS Logic Family. The HCS165MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE HCS165DMSR HCS165KMSR HCS165D/Sample HCS165K/Sample HCS165HMSR CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. ...

Page 2

Functional Diagram OPERATING MODES PL Parallel Load L L Serial Shift H H Hold “Do Nothing” HIGH voltage level h = HIGH voltage level one ...

Page 3

Absolute Maximum Ratings Supply Voltage (VCC -0.5V to +7.0V Input Voltage Range, All Inputs . . ...

Page 4

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL TPLH VCC = 4.5V Q7 TPHL PEN TPLH VCC = 4.5V TPHL TPLH VCC = 4.5V TPHL D7 to ...

Page 5

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Quiescent Current ICC Output Current (Sink) IOL Output Current IOH (Source) Output Voltage Low VOL Output Voltage High VOH Input Leakage Current IIN Noise Immunity FN Functional Test CP or ...

Page 6

CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTES: 1. Alternate Group A testing in ...

Page 7

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 8

AC Timing Diagram VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VIL 0 GND 0 All Intersil semiconductor products are manufactured, assembled ...

Page 9

Die Characteristics DIE DIMENSIONS mils METALLIZATION: Type: AlSi Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY < 2 A/cm BOND PAD SIZE: ...

Related keywords