PXF4333V11 INFINEON [Infineon Technologies AG], PXF4333V11 Datasheet - Page 248

• Manufacturer Part Number: PXF4333V11
• Description: ABM 3G ATM Buf fer Manager
• Manufacturer: INFINEON [Infineon Technologies AG]

The queue number representing the table entry which needs to be read or written must
be written to the Word Address Register (WAR). The dedicated QPT1 table entry is read
into the xQPT1T0/xQPT1T1 transfer registers (x=U,D) or modified by the xQPT1T0/
xQPT1T1 transfer register values with a write mechanism. The associated mask
registers xQPTM0 and xQPTM1 allow a bit-wise Write operation (0 - unmasked, 1 -
masked). In case of Read operation, the dedicated xQPT1T0/xQPT1T1 register bit will
be overwritten by the respective QPT1 table entry bit value. In case of Write operation,
the dedicated xQPT1T0/xQPT1T1 register bit will modify the respective QPT1 table
entry bit value.
The Read or Write process is controlled by the Memory Address Register (MAR). The 5
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the QPT table bit field MAR(4:0) must be set to:
10
18
Bit 5 of MAR starts the transfer and is cleared automatically after execution.
Table 7-16
Bit
Bit
QueueSel(12:0)
Data Sheet
H
H
for QPT1 upstream table,
for QPT1 downstream table.
15
7
WAR Register Mapping for QPT Table Access
Unused(2:0)
14
Selects one of the 8192 queue parameter table entries.
6
13
5
QueueSel(7:0)
12
4
248
11
3
QueueSel(12:8)
10
2
Register Description
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0