PIC24HJ32GP202 MICROCHIP [Microchip Technology], PIC24HJ32GP202 Datasheet - Page 142

• Manufacturer Part Number: PIC24HJ32GP202
• Description: High-Performance, 16-bit Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC24HJ32GP202/204 and PIC24HJ16GP304
REGISTER 14-3:
DS70289A-page 140
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-2
bit 1
bit 0
FRMEN
R/W-0
U-0
—
FRMEN: Framed SPIx Support bit
1 = Framed SPIx support enabled (SSx pin used as frame sync pulse input/output)
0 = Framed SPIx support disabled
SPIFSD: Frame Sync Pulse Direction Control bit
1 = Frame sync pulse input (slave)
0 = Frame sync pulse output (master)
FRMPOL: Frame Sync Pulse Polarity bit
1 = Frame sync pulse is active-high
0 = Frame sync pulse is active-low
Unimplemented: Read as ‘0’
FRMDLY: Frame Sync Pulse Edge Select bit
1 = Frame sync pulse coincides with first bit clock
0 = Frame sync pulse precedes first bit clock
Unimplemented: This bit must not be set to ‘1’ by the user application.
SPIFSD
R/W-0
U-0
—
SPIxCON2: SPIx CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
FRMPOL
R/W-0
U-0
—
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
FRMDLY
R/W-0
U-0
—
U-0
U-0
—
—
bit 8
bit 0