ATMEGA48V_06 ATMEL [ATMEL Corporation], ATMEGA48V_06 Datasheet - Page 228
ATMEGA48V_06
Manufacturer Part Number
ATMEGA48V_06
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_06.pdf
(374 pages)
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20.7.3
228
ATmega48/88/168
Slave Receiver Mode
Figure 20-14. Formats and States in the Master Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a Master Transmitter
(see
are zero or are masked to zero.
Figure 20-15. Data transfer in Slave Receiver mode
To initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:
TWAR
value
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Figure
SDA
SCL
20-15). All the status codes mentioned in this section assume that the prescaler bits
From master to slave
From slave to master
$08
S
TWA6
SLA
Device 1
RECEIVER
SLAVE
TWA5
R
MR
TRANSMITTER
Device 2
A or A
DATA
MASTER
$40
$48
$38
$68
A
A
A
$78
TWA4
Other master
Other master
n
continues
continues
Device’s Own Slave Address
P
$B0
Device 3
DATA
A
TWA3
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
........
$50
$38
To corresponding
states in slave mode
A
A
TWA2
Other master
Device n
DATA
continues
V
CC
$58
A
TWA1
R1
$10
P
R
S
R2
SLA
TWA0
2545J–AVR–12/06
W
R
TWGCE
MT
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