AT32UC3A0512-ALTES ATMEL [ATMEL Corporation], AT32UC3A0512-ALTES Datasheet - Page 65
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AT32UC3A0512-ALTES
Manufacturer Part Number
AT32UC3A0512-ALTES
Description
AVR32 32-Bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3A0512-ALTES.pdf
(86 pages)
- Current page: 65 of 86
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15.1.4
15.1.5
15.1.6
15.1.7
32058FS–AVR32–08/08
Power Manager
PDCA
TWI
SDRAMC
3. SPI Bad Serial Clock Generation on 2nd chip_select when SCBR = 1, CPOL=1 and
4. SPI Glitch on RXREADY flag in slave mode when enabling the SPI or during the first
5. SPI Disable does not work in Slave mode
1. If the BOD level is higher than VDDCORE, the part is constantly under reset
1. Wrong PDCA behavior when using two PDCA channels with the same PID.
1. The TWI RXRDY flag in SR register is not reset when a software reset is performed.
1.
NCPHA=0
When multiple CS are in use, if one of the baudrate equals to 1 and one of the others doesn't
equal to 1, and CPOL=1 and CPHA=0, then an aditional pulse will be generated on SCK.
Fix/workaround
When multiple CS are in use, if one of the baudrate equals 1, the other must also equal 1 if
CPOL=1 and CPHA=0.
transfer
In slave mode, the SPI can generate a false RXREADY signal during enabling of the SPI or
during the first transfer.
Fix/Workaround
1. Set slave mode, set required CPOL/CPHA.
2. Enable SPI.
3. Set the polarity CPOL of the line in the opposite value of the required one.
4. Set the polarity CPOL to the required one.
5. Read the RXHOLDING register.
Transfers can now befin and RXREADY will now behave as expected.
Fix/workaround
Read the last received data then perform a Software reset.
If the BOD level is set to a value higher than VDDCORE and enabled by fuses, the part will
be in constant reset.
Fix/Workaround
Apply an external voltage on VDDCORE that is higher than the BOD level and is lower than
VDDCORE max and disable the BOD.
Fix/Workaround
The same PID should not be assigned to more than one channel.
Fix/Workaround
After a Software Reset, the register TWI RHR must be read.
Code execution from SDRAM does not work.
Fix/Workaround
Do not run code from SDRAM.
Code execution from external SDRAM does not work
AT32UC3A
65
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