P80C31SFPN PHILIPS [NXP Semiconductors], P80C31SFPN Datasheet - Page 21
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P80C31SFPN
Manufacturer Part Number
P80C31SFPN
Description
80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V, low power, high speed 33 MHz
Manufacturer
PHILIPS [NXP Semiconductors]
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DC ELECTRICAL CHARACTERISTICS
T
NOTES:
1. Typical ratings are not guaranteed. The values listed are at room temperature, 5V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
3. Capacitive loading on ports 0 and 2 may cause the V
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
5. See Figures 22 through 25 for I
6. This value applies to T
7. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
8. Under steady state (non-transient) conditions, I
9. ALE is tested to V
10. Pin capacitance is characterized but not tested. Pin capacitance is less than 25pF. Pin capacitance of ceramic package is less than 15pF
2000 Jan 20
amb
SYMBOL
SYMBOL
V
V
V
V
V
V
V
V
V
I
I
I
I
R
C
IL
TL
LI
CC
IL
IH
IH1
OL
OL1
O
OH
OH1
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
RST
IO
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. I
single output sinks more than 5mA and no more than two outputs exceed the test conditions.
address bits are stabilizing.
maximum value when V
If I
test conditions.
(except EA is 25pF).
= 0 C to +70 C or –40 C to +85 C, V
OL
Active mode:
Idle mode:
Maximum I
Maximum I
Maximum total I
exceeds the test condition, V
Input low voltage
Input low voltage
Input high voltage (ports 0, 1, 2, 3, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2,
Output low voltage, port 0, ALE, PSEN
Output high voltage ports 1 2 3
Output high voltage, ports 1, 2, 3
Output high voltage (port 0 in external bus mode),
ALE
Logical 0 input current, ports 1, 2, 3
Logical 1-to-0 transition current, ports 1, 2, 3
Input leakage current, port 0
Power supply current (see Figure 21):
Internal reset pull-down resistor
Pin capacitance
Active mode @ 16MHz
Idle mode @ 16MHz
Power-down mode or clock stopped (see Figure 25
9
OL
OL
f
for conditions)
, PSEN
per port pin:
per 8-bit port:
OH1
OL
I
I
CC
CC
diti
, except when ALE is off then V
3
amb
for all outputs:
IN
= 0.9
= 0.18
10
is approximately 2V.
= 0 C to +70 C. For T
)
(except EA)
PARAMETER
PARAMETER
CC
FREQ. + 1.1mA
FREQ. +1.01mA; See Figure 21.
test conditions.
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
CC
8
15mA (*NOTE: This is 85 C specification.)
26mA
71mA
= 2.7V to 5.5V, V
3
3
OL
8, 7
amb
must be externally limited as follows:
= –40 C to +85 C, I
OH
OH
6
on ALE and PSEN to momentarily fall below the V
is the voltage specification.
SS
= 0V (16MHz devices)
T
0.45 < V
amb
21
T
4.0V < V
2.7V<V
amb
CONDITIONS
I
I
I
I
I
OH
= –40 C to +85 C
OL
OL
V
V
V
OH
V
OH
V
TL
See note 4
See note 5
V
V
CC
CC
CC
CC
CC
= 0 C to 70 C
IN
IN
TEST
= 1.6mA
= 3.2mA
= –3.2mA
IN
= –750 A.
= –20 A
= –30 A
= 0.4V
= 2.0V
CC
= 2.7V
= 2.7V
= 2.7V
= 4.5V
= 2.7V
CC
< V
< 4.0V
< 5.5V
CC
2
2
– 0.3
OL
OL
0.2V
V
V
V
s of ALE and ports 1 and 3. The noise is due
can exceed these conditions provided that no
0.7V
CC
CC
CC
MIN
–0.5
–0.5
CC
–1
40
– 0.7
– 0.7
– 0.7
CC
+0.9
80C51/87C51/80C31
CC
LIMITS
TYP
–0.7 specification when the
3
1
0.2V
V
V
Product specification
CC
CC
MAX
–650
–50
225
0.7
0.4
0.4
CC
50
75
15
10
+0.5
+0.5
–0.1
UNIT
UNIT
k
pF
V
V
V
V
V
V
V
V
V
A
A
A
A
A
A
A