P87C660X2 PHILIPS [NXP Semiconductors], P87C660X2 Datasheet - Page 52

• Manufacturer Part Number: P87C660X2
• Description: 80C51 8-bit microcontroller family
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Software Examples of SIO1 Service Routines: This section
consists of a software example for:
– Initialization of SIO1 after a RESET
– Entering the SIO1 interrupt routine
– The 26 state service routines for the
I
In the initialization routine, SIO1 is enabled for both master and
slave modes. For each mode, a number of bytes of internal data
RAM are allocated to the SIO to act as either a transmission or
reception buffer. In this example, 8 bytes of internal data RAM are
reserved for different purposes. The data memory map is shown in
Figure 29. The initialization routine performs the following functions:
– S1ADR is loaded with the part’s own slave address and the
– P1.6 and P1.7 bit latches are loaded with logic 1s
– RAM location HADD is loaded with the high-order address byte of
– The SIO1 interrupt enable and interrupt priority bits are set
– The slave mode is enabled by simultaneously setting the ENS1
The SIO1 hardware now begins checking the I
slave address and general call. If the general call or the own slave
address is detected, an interrupt is requested and S1STA is loaded
with the appropriate state information. The following text describes a
fast method of branching to the appropriate service routine.
2003 Oct 02
NITIALIZATION
general call bit (GC)
the service routines
and AA bits in S1CON and the serial clock frequency (for master
modes) is defined by loading CR0 and CR1 in S1CON. The
master routines must be started in the main program.
80C51 8-bit microcontroller family
RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33
MHz), two 400KB I
– Master transmitter mode
– Master receiver mode
– Slave receiver mode
– Slave transmitter mode
(1) Unsuccessful attempt to send a Start condition
(2) SDA line released
(3) Successful attempt to send a Start condition; state 08H is entered
STA FLAG
SDA LINE
SCL LINE
2
C interfaces
Figure 28. Recovering from a Bus Obstruction Caused by a Low Level on SDA
(1)
16 KB OTP/ROM, 512B
2
C bus for its own
(1)
52
The state service routines are located in a 256-byte page of program
SIO
When the SIO1 interrupt is entered, the PSW is first pushed on the
stack. Then S1STA and HADD (loaded with the high-order address
byte of the 26 service routines by the initialization routine) are
pushed on to the stack. S1STA contains a status code which is the
lower byte of one of the 26 service routines. The next instruction is
RET, which is the return from subroutine instruction. When this
instruction is executed, the HIGH and LOW order address bytes are
popped from stack and loaded into the program counter.
The next instruction to be executed is the first instruction of the state
service routine. Seven bytes of program code (which execute in
eight machine cycles) are required to branch to one of the 26 state
service routines.
SI
memory. The location of this page is defined in the initialization
routine. The page can be located anywhere in program memory by
loading data RAM register HADD with the page number. Page 01 is
chosen in this example, and the service routines are located
between addresses 0100H and 01FFH.
T
The state service routines are located 8 bytes from each other. Eight
bytes of code are sufficient for most of the service routines. A few of
the routines require more than 8 bytes and have to jump to other
locations to obtain more bytes of code. Each state routine is part of
the SIO1 interrupt routine and handles one of the 26 states. It ends
with a RETI instruction which causes a return to the main program.
HE
1
S
I
TATE
NTERRUPT
PUSH PSW
PUSH S1STA
PUSH HADD
RET
S
(2)
ERVICE
START CONDITION
R
OUTINE
R
OUTINES
(3)
Save PSW
Push status code
(LOW order address byte)
Push HIGH order address byte
Jump to state service routine
P8xC660X2/661X2
SU00977
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