DSPIC30F6011A MICROCHIP [Microchip Technology], DSPIC30F6011A Datasheet - Page 151
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DSPIC30F6011A
Manufacturer Part Number
DSPIC30F6011A
Description
High-Performance Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.DSPIC30F6011A.pdf
(238 pages)
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20.2.8
A write to the OSCCON register is intentionally made
difficult because it controls clock switching and clock
scaling.
To write to the OSCCON low byte, the following code
sequence must be executed without any other
instructions in between:
Byte write is allowed for one instruction cycle. Write the
desired value or use bit manipulation instruction.
To write to the OSCCON high byte, the following
instructions must be executed without any other
instructions in between:
Byte write is allowed for one instruction cycle. Write the
desired value or use bit manipulation instruction.
REGISTER 20-1:
© 2005 Microchip Technology Inc.
Upper Byte:
bit 15
bit 15
bit 14-12 COSC<2:0>: Current Oscillator Group Selection (Read Only)
bit 11
Byte Write “0x46” to OSCCON low
Byte Write “0x57” to OSCCON low
Byte Write “0x78” to OSCCON high
Byte Write “0x9A” to OSCCON high
U-0
—
Unimplemented: Read as ‘0’
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits
011 = External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by FPR<4:0> bits
010 = LPRC internal low-power RC
001 = FRC internal fast RC
000 = LP crystal oscillator; SOSCI/SOSCO pins
Set to FOS<2:0> values on POR or BOR.
Loaded with NOSC<2:0> at the completion of a successful clock switch.
Set to FRC value when FSCM detects a failure and switches clock to FRC.
Unimplemented: Read as ‘0’
PROTECTION AGAINST
ACCIDENTAL WRITES TO OSCCON
R-y
Lower Byte:
bit 7
R/W-0
OSCCON: OSCILLATOR CONTROL REGISTER
dsPIC30F6011A/6012A/6013A/6014A
POST<1:0>
COSC<2:0>
R-y
R/W-0
R-y
LOCK
R-0
Preliminary
U-0
—
U-0
—
20.3
The oscillators are controlled with two SFRs,
OSCCON and OSCTUN and one Configuration
register, FOSC.
Note:
R/W-y
R/W-0
Oscillator Control Registers
CF
The description of the OSCCON and
OSCTUN SFRs, as well as the FOSC
Configuration register provided in this
section
dsPIC30F6011A/6012A/6013A/6014A
devices in the dsPIC30F product family.
NOSC<2:0>
R/W-y
are
U-0
—
R/W-y
applicable
LPOSCEN
bit 8
R/W-0
DS70143B-page 149
only
OSWEN
R/W-0
to
bit 0
the
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