EP9315-EB CIRRUS [Cirrus Logic], EP9315-EB Datasheet - Page 42

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EP9315-EB

Manufacturer Part Number
EP9315-EB
Description
Enhanced Universal Platform System-on-Chip Processor
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
EP9315
Enhanced Universal Platform SOC Processor
42
HSTROBE
HSTROBE
DDMARDYn
DD (15:0)
DD (15:0)
HSTROBE
(device)
(device)
DD (15:0)
DMACKn
DMARQ
(device)
(device)
(host)
(host)
STOP
Note:
Note:
(host)
(host)
(host)
(host)
DD (15:0) and HSTROBE signals are shown at both the device and the host to emphasize that cable settling time as well as
cable propagation delay shall not allow the data signals to be considered stable at the device until some time after they are
driven by the host.
1. The device may negate DMARQ to request termination of the Ultra DMA burst no sooner than t
2. If the t
negated.
t
DH
t
DVH
SR
timing is not satisfied, the device may receive zero, one, or two more data words from the host.
©
t
Figure 28. Device Pausing an Ultra DMA data-out Burst
CYCWR
Copyright 2005 Cirrus Logic (All Rights Reserved)
Figure 27. Sustained Ultra DMA data-out Burst
t
DS
t
t
SR
DVS
t
2CYCWR
t
DH
t
DVH
t
CYCWR
t
RFS
t
DS
t
RP
t
DVS
t
t
DH
2CYCWR
t
DVH
RP
after DDMARDYn is
DS638PP4

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