EP9315-EB CIRRUS [Cirrus Logic], EP9315-EB Datasheet - Page 62

• Manufacturer Part Number: EP9315-EB
• Description: Enhanced Universal Platform System-on-Chip Processor
• Manufacturer: CIRRUS [Cirrus Logic]

EP9315
Enhanced Universal Platform SOC Processor
Table T
62
illustrates the pin signal multiplexing and configuration options.
Pin Name
IDEDA[2:0]
EGPIO[10]
EGPIO[11]
EGPIO[12]
EGPIO[13]
EGPIO[14]
EGPIO[15]
Physical
DD[15:12]
ROW[7:0]
EGPIO[0]
EGPIO[1]
EGPIO[2]
EGPIO[3]
EGPIO[4]
EGPIO[5]
EGPIO[6]
EGPIO[7]
EGPIO[8]
EGPIO[9]
ABITCLK
IDECS0n
IDECS1n
FGPIO[7]
FGPIO[6]
FGPIO[5]
FGPIO[4]
FGPIO[3]
FGPIO[2]
FGPIO[1]
FGPIO[0]
COL[7:0]
SSPRX1
SLA[1:0]
SSPTX1
ASYNC
SFRM1
GRLED
RDLED
DD[7:0]
EEDAT
EECLK
ARSTn
SCLK1
DIORn
ASDO
ASDI
©
Copyright 2005 Cirrus Logic (All Rights Reserved)
Transmit Enable output / HDLC clocks
IDE Device active / present
Table T. Pin Multiplex Usage Information
DMA Acknowledge 0
DMA Acknowledge 1
I2S Transmit Data 1
I2S Transmit Data 2
I2S Transmit Data 0
I2S Transmit Data 0
Ring Indicator Input
I2S Receive Data 1
I2S Receive Data 2
I2S Receive Data 0
I2S Receive Data 0
1Hz clock monitor
IDE DMA request
I2S Frame Clock
I2S Master clock
I2S Frame Clock
DMA Request 0
DMA Request 1
I2S Serial clock
I2S Serial clock
PWM 1 output
Description
DMA EOT 0
DMA EOT 1
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
LED
LED
TENn / HDLCCLK1 / HDLCCLK3
Multiplex signal name
GPIO Port G[7:4]
GPIO Port G[3:2]
GPIO Port D[7:0]
GPIO Port C[7:0]
GPIO Port E[7:5]
GPIO Port H[7:0]
GPIO Port G[1]
GPIO Port G[0]
GPIO Port E[4]
GPIO Port E[3]
GPIO Port E[2]
GPIO Port E[1]
GPIO Port E[0]
PWMOUT1
MCBVD2
MCBVD1
CLK1HZ
DMARQ
DREQ0
DREQ1
READY
DACK0
DEOT0
DACK1
DEOT1
MCLK
MCD2
MCD1
SDO1
SDO2
DASP
SCLK
LRCK
SDO0
SCLK
LRCK
SDO0
SDI1
SDI2
SDI0
SDI0
VS2
VS1
WP
RI
DS638PP4