MC908GR16ACFA FREESCALE [Freescale Semiconductor, Inc], MC908GR16ACFA Datasheet - Page 164

• Manufacturer Part Number: MC908GR16ACFA
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Enhanced Serial Communications Interface (ESCI) Module
14.8.5 ESCI Status Register 2
ESCI status register 2 (SCS2) contains flags to signal these conditions:
BKF — Break Flag Bit
RPF — Reception in Progress Flag Bit
14.8.6 ESCI Data Register
The ESCI data register (SCDR) is the buffer between the internal data bus and the receive and transmit
shift registers. Reset has no effect on data in the ESCI data register.
R7/T7:R0/T0 — Receive/Transmit Data Bits
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This clearable, read-only bit is set when the ESCI detects a break character on the RxD pin. In SCS1,
the FE and SCRF bits are also set. In 9-bit character transmissions, the R8 bit in SCC3 is cleared. BKF
does not generate a CPU interrupt request. Clear BKF by reading SCS2 with BKF set and then reading
the SCDR. Once cleared, BKF can become set again only after 1s again appear on the RxD pin
followed by another break character. Reset clears the BKF bit.
This read-only bit is set when the receiver detects a 0 during the RT1 time period of the start bit search.
RPF does not generate an interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch), or when the receiver detects an idle character. Polling
RPF before disabling the ESCI module or entering stop mode can show whether a reception is in
progress.
Reading address $0018 accesses the read-only received data bits, R7:R0. Writing to address $0018
writes the data to be transmitted, T7:T0. Reset has no effect on the ESCI data register.
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
Break character detected
Incoming data
Address:
Address:
Do not use read-modify-write instructions on the ESCI data register.
Reset:
Reset:
Read:
Read:
Write:
Write:
$0017
$0018
Bit 7
Bit 7
R7
T7
0
0
Figure 14-15. ESCI Status Register 2 (SCS2)
Figure 14-16. ESCI Data Register (SCDR)
= Unimplemented
R6
T6
6
0
0
6
MC68HC908GR16A Data Sheet, Rev. 1.0
R5
T5
5
0
0
5
NOTE
Unaffected by reset
R4
T4
4
0
0
4
R3
T3
3
0
0
3
R2
T2
2
0
0
2
BKF
R1
T1
1
0
1
Freescale Semiconductor
Bit 0
RPF
Bit 0
R0
T0
0