MCF5485 FREESCALE [Freescale Semiconductor, Inc], MCF5485 Datasheet - Page 12
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MCF5485
Manufacturer Part Number
MCF5485
Description
Integrated Microprocessor Electrical Characteristics
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MCF5485.pdf
(30 pages)
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Reset Timing Specifications
7
Table 9
Figure 10
8
A multi-function external bus interface called FlexBus is provided on the MCF5482 with basic functionality to interface to
slave-only devices up to a maximum bus frequency of 66 MHz. It can be directly connected to asynchronous or synchronous
devices such as external boot ROMs, flash memories, gate-array logic, or other simple target (slave) devices with little or no
additional circuitry. For asynchronous devices, a simple chip-select based interface can be used. The FlexBus interface has six
general purpose chip-selects (FBCS[5:0]). Chip-select FBCS0 can be dedicated to boot ROM access and can be programmed
to be byte (8 bits), word (16 bits), or longword (32 bits) wide. Control signal timing is compatible with common ROM / flash
memories.
12
lists specifications for the reset timing parameters shown in
shows reset timing for the values in
Reset Timing Specifications
FlexBus
Mode Select
1
MCF5485 Integrated Microprocessor Electrical Characteristics, Rev. 3
Num
RSTI and FlexBus data lines are synchronized internally. Setup and hold
times must be met only if recognition on a particular clock is required.
R1
FlexBus
R2
R3
CLKIN
1
RSTI
Valid to CLKIN (setup)
CLKIN to invalid (hold)
RSTI to invalid (hold)
NOTE:
Mode selects are registered on the rising clock edge before
the cycle in which RSTI is recognized as being negated.
Table 9. Reset Timing Specification
R1
Characteristic
Table
Figure 10. Reset Timing
9.
R2
Figure 10
50 MHz CLKIN
Min
1.0
1.0
8
R1
R3
Max
—
—
—
Units
ns
ns
ns
Freescale Semiconductor