M3850 RENESAS [Renesas Technology Corp], M3850 Datasheet - Page 81

• Manufacturer Part Number: M3850
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev.2.10
REJ03B0093-0210
3850 Group (Spec.A)
APPENDIX
NOTES ON PROGRAMMING
1. Processor status register
(1) Initializing of processor status register
Flags which affect program execution must be initialized after a reset.
In particular, it is essential to initialize the T and D flags because
they have an important effect on calculations.
<Reason>
After a reset, the contents of the processor status register (PS)
are undefined except for the I flag which is “1”.
Fig. 1 Initialization of processor status register
(2) How to reference the processor status register
To reference the contents of the processor status register (PS), ex-
ecute the PHP instruction once then read the contents of (S+1). If
necessary, execute the PLP instruction to return the PS to its origi-
nal status.
2. BRK instruction
(1) Interrupt priority level
When the BRK instruction is executed with the following condi-
tions satisfied, the interrupt execution is started from the address
of interrupt vector which has the highest priority.
• Interrupt request bit and interrupt enable bit are set to “1”.
• Interrupt disable flag (I) is set to “1” to disable interrupt.
Fig. 2 Stack memory contents after PHP instruction execution
2005.11.14
( S ) + 1
( S )
Initializing of flags
Main program
page 81 of 86
Reset
S t o r e d P S
3. Decimal calculations
(1) Execution of decimal calculations
The ADC and SBC are the only instructions which will yield proper
decimal notation, set the decimal mode flag (D) to “1” with the
SED instruction. After executing the ADC or SBC instruction, ex-
ecute another instruction before executing the SEC, CLC, or CLD
instruction.
(2) Notes on status flag in decimal mode
When decimal mode is selected, the values of three of the flags in
the status register (the N, V, and Z flags) are invalid after a ADC or
SBC instruction is executed.
The carry flag (C) is set to “1” if a carry is generated as a result of
the calculation, or is cleared to “0” if a borrow is generated. To de-
termine whether a calculation has generated a carry, the C flag
must be initialized to “0” before each calculation. To check for a
borrow, the C flag must be initialized to “1” before each calcula-
tion.
Fig. 3 Execution of decimal calculations
4. JMP instruction
When using the JMP instruction in indirect addressing mode, do
not specify the last address on a page as an indirect address.
5. Multiplication and Division Instructions
• The index X mode (T) and the decimal mode (D) flags do not af-
• The execution of these instructions does not change the con-
6. Ports
The contents of the port direction registers cannot be read. The
following cannot be used:
• The data transfer instruction (LDA, etc.)
• The operation instruction when the index X mode flag (T) is “1”
• The addressing mode which uses the value of a direction regis-
• The bit-test instruction (BBC or BBS, etc.) to a direction register
• The read-modify-write instructions (ROR, CLB, or SEB, etc.) to a
Use instructions such as LDM and STA, etc., to set the port direc-
tion registers.
7. Instruction Execution Timing
The instruction execution time can be obtained by multiplying the
frequency of the internal clock
tioned in the 740 Family Software Manual.
The frequency of the internal clock
high-speed mode, 8 times the X
and the twice the X
fect the MUL and DIV instruction.
tents of the processor status register.
ter as an index
direction register.
SEC, CLC, or CLD instruction
CIN
ADC or SBC instruction
in low-speed mode.
Set D flag to “1”
NOP instruction
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
IN
by the number of cycles men-
cycle in middle-speed mode,
is the twice the X
IN
cycle in