X4163 INTERSIL [Intersil Corporation], X4163 Datasheet - Page 9

• Manufacturer Part Number: X4163
• Description: CPU Supervisor with 16K EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

Figure 8. Byte Write Sequence
Serial Write Operations
B
For a write operation, the device requires the Slave
Address Byte and a Word Address Byte. This gives
the master access to any one of the words in the
array. After receipt of the Word Address Byte, the
device responds with an acknowledge, and awaits
the next eight bits of data. After receiving the 8 bits of
the Data Byte, the device again responds with an
acknowledge. The master then terminates the trans-
fer by generating a stop condition, at which time the
device begins the internal write cycle to the nonvola-
tile memory. During this internal write cycle, the
device inputs are disabled, so the device will not
respond to any requests from the master. The SDA
output is at high impedance. See Figure 8.
A write to a protected block of memory will suppress
the acknowledge bit.
Figure 9. Page Write Operation
YTE
W
Signals from
Signals from
SDA Bus
RITE
the Master
the Slave
Signals from
Signals from
the Master
the Slave
SDA Bus
S
a
t
r
t
1
0
Address
1
9
Slave
0
S
a
r
t
t
1
0
0
Address
1
C
A
K
Slave
0
Word Address
Byte 1
0
C
A
K
X4163, X4165
Word Address
Byte 1
C
A
K
Word Address
Page Write
The device is capable of a page write operation. It is
initiated in the same manner as the byte write opera-
tion; but instead of terminating the write cycle after the
first data byte is transferred, the master can transmit
an unlimited number of 8-bit bytes. After the receipt of
each byte, the device will respond with an acknowl-
edge, and the address is internally incremented by
one. The page address remains constant. When the
counter reaches the end of the page, it “rolls over” and
goes back to ‘0’ on the same page. This means that
the master can write 64 bytes to the page starting at
any location on that page. If the master begins writing
at location 60, and loads 12-bytes, then the first 4-
bytes are written to locations 60 through 63, and the
last 8-bytes are written to locations 0 through 7. After-
wards, the address counter would point to location 8 of
the page that was just written. If the master supplies
more than 64-bytes of data, then new data over-writes
the previous data, one byte at a time.
Byte 0
A
C
K
Word Address
Byte 0
A
C
K
Data
(1)
A
C
K
Data
(1 < n < 64)
C
A
K
Data
(n)
C
A
K
S
o
p
t
A
C
K
S
o
p
April 13, 2005
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FN8120.0