XR16C850CM EXAR [Exar Corporation], XR16C850CM Datasheet - Page 55

• Manufacturer Part Number: XR16C850CM
• Description: 2.97V TO 5.5V UART WITH 128-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

xr
REV. 2.3.1
GENERAL DESCRIPTION................................................................................................. 1
PIN DESCRIPTIONS .......................................................................................................... 3
1.0 PRODUCT DESCRIPTION .................................................................................................................... 8
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................................ 9
F
A
ORDERING INFORMATION
EATURES
PPLICATIONS
Intel Bus Mode Interface. The SEL pin is connected to VCC. ..................................................................................... 3
PC Mode Interface Signals. Connect SEL pin to GND to select PC Mode. ................................................................ 5
MODEM OR SERIAL I/O INTERFACE ....................................................................................................................... 6
ANCILLARY SIGNALS ................................................................................................................................................ 6
2.1 HOST DATA BUS INTERFACE ....................................................................................................................... 9
2.2 PC MODE ........................................................................................................................................................ 10
2.3 16-BIT BUS INTERFACE ............................................................................................................................... 11
2.4 5-VOLT TOLERANT INPUTS ......................................................................................................................... 11
2.5 DEVICE RESET .............................................................................................................................................. 11
2.6 DEVICE IDENTIFICATION AND REVISION .................................................................................................. 11
2.7 INTERNAL REGISTERS ................................................................................................................................. 12
2.8 DMA MODE .................................................................................................................................................... 12
2.9 INTERRUPTS ................................................................................................................................................. 13
2.10 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK ..................................................................................... 13
2.11 PROGRAMMABLE BAUD RATE GENERATOR ......................................................................................... 14
2.12 TRANSMITTER ............................................................................................................................................. 15
2.13 RECEIVER .................................................................................................................................................... 16
2.14 AUTO RTS (HARDWARE) FLOW CONTROL ............................................................................................. 18
2.15
2.16
2.17 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ................................................................................... 20
2.18
2.19
2.20 INFRARED MODE ........................................................................................................................................ 21
2.21
2.22
F
F
F
F
T
F
F
T
T
F
F
T
F
F
F
F
T
F
T
F
F
F
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
IGURE
IGURE
IGURE
2.12.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY....................................................................................... 15
2.12.2 TRANSMITTER OPERATION IN NON-FIFO MODE ................................................................................................ 15
2.12.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 15
2.13.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 16
AUTO CTS (HARDWARE) FLOW CONTROL ............................................................................................ 19
AUTO RTS HYSTERESIS ........................................................................................................................... 18
SPECIAL CHARACTER DETECT ............................................................................................................... 20
AUTO RS485 HALF-DUPLEX CONTROL .................................................................................................. 20
SLEEP MODE WITH AUTO WAKE-UP ...................................................................................................... 23
INTERNAL LOOPBACK .............................................................................................................................. 24
1: PC M
2: TXRDY#
3: I
4: T
5: A
6: A
1. B
2. P
3. XR16C850 I
4. XR16C850 PC M
5. PC M
6. XR16C850 16-B
7. T
8. B
9. T
10. T
11. R
12. R
13. A
14. A
15. I
16. I
..................................................................................................................................................... 1
NTERRUPT
YPICAL DATA RATES WITH A
UTO
UTO
LOCK
INOUTS
YPICAL OSCILLATOR CONNECTIONS
AUD
RANSMITTER
NFRARED
NTERNAL
............................................................................................................................................... 1
RANSMITTER
ECEIVER
ECEIVER
UTO
UTO
ODE
RTS H
X
ODE
R
ON
D
RTS
RS-485 H
ATE
AND
IAGRAM
I
I
/X
N
NTERFACE
O
I
NTERFACE IN AN
L
OFF
T
I
O
O
YSTERESIS
UTPUT
G
NTEL
OOPBACK
AND
RANSMIT
NTEL
RXRDY# O
PERATION IN NON
PERATION IN
ENERATOR
O
................................................................................................................................ 3
O
PERATION IN NON
(S
............................................................................................................................................................. 1
PERATION IN
CTS F
IT
ALF
B
ODE
OFTWARE
B
F
US
B
US
UNCTIONS
O
-D
US
................................................................................................................................................... 24
D
I
N
M
.................................................................................................................................................. 18
NTERCONNECTIONS
I
UPLEX
ATA
-
LOW
NTERCONNECTIONS
ODE
CHIP
............................................................................................................................................... 14
I
UTPUTS IN
NTERFACE
FIFO
14.7456 MH
E
) F
E
C
MBEDDED
A
NCODING AND
A
FIFO
C
TABLE OF CONTENTS
...................................................................................................................................... 13
-FIFO M
LOW
ONTROL
ND
DDRESS
ONTROL
AND
-FIFO M
PC M
............................................................................................................................... 13
C
.............................................................................................................................. 11
FIFO
AND
A
ONTROL
UTO
A
ODE
O
D
Z CRYSTAL OR EXTERNAL CLOCK
ODE
....................................................................................................................... 21
F
PPLICATION
PERATION
ECODER AND
ODE
AND
LOW
...................................................................................................................... 9
RTS F
.................................................................................................................... 9
.................................................................................................................. 17
R
, TQFP A
............................................................................................................... 20
ECEIVE
.............................................................................................................. 15
DMA M
C
ONTROL
LOW
....................................................................................................... 19
..................................................................................................... 10
I
D
ND
ODE
ATA
I
C
NTERRUPT
ONTROL
M
PLCC P
........................................................................................... 12
D
ODE
ECODING
................................................................................... 16
2.97V TO 5.5V UART WITH 128-BYTE FIFO
M
ACKAGES
S
ODE
ELECTION
.......................................................................... 22
....................................................................... 17
...................................................................... 14
................................................................... 2
.............................................................. 10
XR16C850