XR16C854CV EXAR [Exar Corporation], XR16C854CV Datasheet
XR16C854CV
Manufacturer Part Number
XR16C854CV
Description
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR16C854CV.pdf
(54 pages)
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xr
AUGUST 2005
GENERAL DESCRIPTION
The XR16C854/854D
Universal Asynchronous Receiver and Transmitter
(UART) each with 128 bytes of transmit and receive
FIFOs, transmit and receive FIFO counters and
trigger levels, automatic hardware and software flow
control, and data rates of up to 2 Mbps. Each UART
has a set of registers that provide the user with
operating
indications, and modem serial interface controls.
System interrupts may be tailored to meet design
requirements. An internal loopback capability allows
onboard diagnostics. The 854 is available in 64-pin
LQFP, 68-pin PLCC and 100-pin QFP packages. The
64-pin package only offers the 16 mode interface, but
the 68 and 100 pin packages offer an additional 68
mode interface which allows easy integration with
Motorola processors.
offers three state interrupt outputs while the
XR16C854DV provides continuous interrupt outputs.
The 100 pin package provides additional FIFO status
outputs (TXRDY# and RXRDY# A-D), separate
infrared transmit data outputs (IRTX A-D) and
channel C external clock input (CHCCLK).
XR16C854/854D is compatible with the industry
standard ST16C554/554D and ST16C654/654D.
N
Exar
F
OTE
IGURE
:
RXRDY# A-D
TXRDY# A-D
Corporation 48720 Kato Road, Fremont CA, 94538
1 Covered by U.S. Patent #5,649,122 and #5,949,787.
1. XR16C854 B
CHCCLK
INTSEL
16/68#
D7:D0
A2:A0
CSD#
IOW #
CSA#
CSB#
CSC#
IOR#
INTD
INTC
Reset
INTB
INTA
status
and
1
(854) is an enhanced quad
The XR16C854CV (64 pin)
LOCK
Data Bus
Interface
control,
D
IAGRAM
receiver
error
The
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
•
UART
(510) 668-7000
Regs
BRG
(same as Channel A)
(same as Channel A)
(same as Channel A)
Crystal Osc/Buffer
FEATURES
Added feature in devices with top mark date code of
"F2 YYWW" and newer:
•
•
•
•
•
•
APPLICATIONS
•
•
•
•
•
UART Channel B
UART Channel C
UART Channel D
UART Channel A
2.97 to 5.5 Volt Operation
Pin-to-pin compatible with the industry standard
ST16C554 and ST16C654 and TI’s TL16C554N
and TL16C754BFN
Intel or Motorola Data Bus Interface select
Four independent UART channels
Sleep Mode (200 uA typical)
Crystal oscillator or external clock input
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
TX & RX
128 Byte TX FIFO
128 Byte RX FIFO
■
■
■
■
■
■
■
■
■
■
5 volt tolerant inputs
Register Set Compatible to 16C550
Data rates of up to 2 Mbps
Transmit and Receive FIFOs of 128 bytes
Programmable TX and RX FIFO Trigger Levels
Transmit and Receive FIFO Level Counters
Automatic Hardware (RTS/CTS) Flow Control
Selectable Auto RTS Flow Control Hysteresis
Automatic Software (Xon/Xoff) Flow Control
Wireless Infrared (IrDA 1.0) Encoder/Decoder
•
ENDEC
FAX (510) 668-7017
IR
TXA, RXA, IRTXA, DTRA#,
DSRA#, RTSA#, CTSA#,
CDA#, RIA#, OP2A#
TXB, RXB, IRTXB, DTRB#,
DSRB#, RTSB#, CTSB#,
CDB#, RIB#, OP2B#
TXC, RXC, IRTXC, DTRC#,
DSRC#, RTSC#, CTSC#,
CDC#, RIC#, OP2C#
TXD, RXD, IRTXD, DTRD#,
DSRD#, RTSD#, CTSD#,
CDD#, RID#, OP2D#
2.97V to 5.5V VCC
GND
XTAL1
XTAL2
•
www.exar.com
854 BLK
REV. 3.0.1
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