XR20M1170IL16 EXAR [Exar Corporation], XR20M1170IL16 Datasheet - Page 9
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XR20M1170IL16
Manufacturer Part Number
XR20M1170IL16
Description
I2C/SPI UART WITH 64-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR20M1170IL16.pdf
(60 pages)
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Quantity
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Part Number:
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REV. 1.0.0
There could be many devices on the I
are eight possible slave addresses that can be selected for the M1170 using the A1 and A0 address lines.
Table 1
select each I2C address.
An I
UART register address being accessed. A read or write transaction is determined by bit-0 of the slave
address.
After the last read or write transaction, the I
2.1.1.1
2
C sub-address is sent by the I
below shows the different addresses that can be selected. Note that there are two different ways to
Table 2
I
2
C-bus Addressing
below lists the functions of the bits in the I
B
6:3
2:1
7
0
IT
GND
GND
GND
GND
VCC
VCC
VCC
VCC
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
A1
T
ABLE
Reserved
UART Internal Register Address A3:A0
UART Channel Select
’00’ = UART Channel A, other values are reserved
Reserved
T
ABLE
2
2: I
2
VCC
GND
VCC
GND
VCC
GND
VCC
GND
SDA
SDA
SDA
SDA
C master following the slave address. The sub-address contains the
SCL
SCL
SCL
SCL
C-bus. To distinguish itself from the other devices on the I
A0
2
1: XR20M1170 I
C S
2
C-bus master will set the SCL signal back to its idle state (HIGH).
UB
-A
DDRESS
9
F
UNCTION
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6A (0110 101X)
0x6C (0110 110X)
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6A (0110 101X)
0x6C (0110 110X)
0x66 (0110 011X)
0x6E (0110 111X)
0x66 (0110 011X)
0x6E (0110 111X)
2
(R
C A
I
2
2
C A
C sub-address.
EGISTER
DDRESS
DDRESS
A
M
DDRESS
I2C/SPI UART WITH 64-BYTE FIFO
AP
)
XR20M1170
2
C-bus, there