WM8951L_07 WOLFSON [Wolfson Microelectronics plc], WM8951L_07 Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
WM8951L_07
Manufacturer Part Number
WM8951L_07
Description
Stereo ADC with Microphone Input and Clock Generator
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8951L_07.pdf
(42 pages)
- Current page: 11 of 42
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Production Data
DIGITAL AUDIO INTERFACE – SLAVE MODE
Figure 5 Slave Mode Connection
Figure 6 Digital Audio Data Timing – Slave Mode
w
Test Conditions
AVDD1, AVDD2, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T
256fs unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
ADCLRC set-up time to
BCLK rising edge
ADCLRC hold time from
BCLK rising edge
ADCDAT propagation delay
from BCLK falling edge
ADCLRC
ADCDAT
WM8951
ADC
BCLK
ADCLRC
ADCDAT
BCLK
SYMBOL
t
t
t
t
t
LRSU
BCH
t
BCY
BCL
LRH
DD
t
BCH
t
BCY
t
DD
TEST CONDITIONS
t
BCL
t
LRH
ENCODER/
DECODER
DSP
A
= +25
t
MIN
LRSU
50
20
20
10
10
o
0
C, Slave Mode, fs = 48kHz, XTI/MCLK =
TYP
PD Rev 4.1 December 2007
MAX
15
WM8951
UNIT
ns
ns
ns
ns
ns
ns
11
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