AGL015V2-CS144 ACTEL [Actel Corporation], AGL015V2-CS144 Datasheet - Page 102

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AGL015V2-CS144

Manufacturer Part Number
AGL015V2-CS144
Description
IGLOO Low-Power Flash FPGAs with Flash Freeze Technology
Manufacturer
ACTEL [Actel Corporation]
Datasheet
IGLOO DC and Switching Characteristics
Table 2-152 • Register Delays
2 -8 8
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
CLKQ
SUD
HD
SUE
HE
CLR2Q
PRE2Q
REMCLR
RECCLR
REMPRE
RECPRE
WCLR
WPRE
CKMPWH
CKMPWL
For specific junction temperature and voltage supply levels, refer to
values.
1.2 V DC Core Voltage
Commercial-Case Conditions: T
Clock-to-Q of the Core Register
Data Setup Time for the Core Register
Data Hold Time for the Core Register
Enable Setup Time for the Core Register
Enable Hold Time for the Core Register
Asynchronous Clear-to-Q of the Core Register
Asynchronous Preset-to-Q of the Core Register
Asynchronous Clear Removal Time for the Core Register
Asynchronous Clear Recovery Time for the Core Register
Asynchronous Preset Removal Time for the Core Register
Asynchronous Preset Recovery Time for the Core Register
Asynchronous Clear Minimum Pulse Width for the Core Register
Asynchronous Preset Minimum Pulse Width for the Core Register
Clock Minimum Pulse Width HIGH for the Core Register
Clock Minimum Pulse Width LOW for the Core Register
J
= 70°C, Worst-Case V
A d v a n c e v 0. 5
Description
CC
= 1.14 V
Table 2-7 on page 2-7
1.61
1.17
0.00
1.29
0.00
0.87
0.89
0.00
0.24
0.00
0.24
0.46
0.46
0.95
0.95
Std.
for derating
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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