LFEC LATTICE [Lattice Semiconductor], LFEC Datasheet - Page 50

• Manufacturer Part Number: LFEC
• Description: LatticeECP/EC Family Data Sheet
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
LatticeECP/EC External Switching Characteristics
Figure 3-6. DDR Timings
General I/O Pin Parameters (Using Primary Clock without PLL)
t
t
t
t
t
f
DDR I/O Pin Parameters
t
t
t
t
f
Primary and Secondary Clock
f
t
t
1. General timing numbers based on LVCMOS2.5V, 12 mA.
2. DDR timing numbers based on SSTL I/O.
3. DDR specifications are characterized but not tested.
4. UI is average bit period.
Rev F 0.17
CO
SU
H
SU_DEL
H_DEL
MAX_IO
DVADQ
DVEDQ
DQVBS
DQVAS
MAX_DDR
MAX_PRI
W_PRI
SKEW_PRI
Parameter
4
4
Clock to Output - PIO Output Register
Clock to Data Setup - PIO Input Register
Clock to Data Hold - PIO Input Register
Clock to Data Setup - PIO Input Register
with data input delay
Clock to Data Hold - PIO Input Register
with Input Data Delay
LVDS I/O Buffer Frequency
Data Valid After DQS (DDR Read)
Data Hold After DQS (DDR Read)
Data Valid Before DQS
Data Valid After DQS
DDR Clock Frequency
Frequency for Primary Clock Tree
Clock Pulse Width for Primary Clock
Primary Clock Skew within an I/O Bank
2, 3
Description
DQ and DQS Read Timings
DQS
DQ
DQ and DQS Write Timings
DQS
DQ
Over Recommended Operating Conditions
t
DQVBS
t
DVADQ
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
LFEC20
Device
3-14
t
DVEDQ
t
DQVAS
1
0.668
-0.44
Min.
0.00
3.41
3.84
1.19
0.2
0.2
95
—
—
—
—
—
-5
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
0.192
Max.
5.71
420
200
420
250
—
—
—
—
—
—
—
—
0.668
-0.54
Min.
0.00
4.09
4.62
1.19
0.2
0.2
95
—
—
—
—
—
-4
0.192
Max.
6.85
378
166
378
300
—
—
—
—
—
—
—
—
0.668
-0.61
Min.
0.00
4.77
5.38
1.19
0.2
0.2
95
—
—
—
—
—
-3
0.192
Max.
7.99
340
133
340
350
—
—
—
—
—
—
—
—
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
UI
UI
UI
UI
ns
ps