A54SX16-1CG256 ACTEL [Actel Corporation], A54SX16-1CG256 Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
A54SX16-1CG256
Manufacturer Part Number
A54SX16-1CG256
Description
SX Family FPGAs RadTolerant and HiRel
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A54SX16-1CG256.pdf
(46 pages)
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Chip Architecture
The SX family’s chip architecture provides a unique
approach to module organization and chip routing that
delivers the best register/logic mix for a wide variety of
new and emerging applications.
Module Organization
Actel has arranged all C-cell and R-cell logic modules into
horizontal banks called Clusters. There are two types of
Clusters: Type 1 contains two C-cells and one R-cell, and
Type 2 contains one C-cell and two R-cells.
Figure 1-5 • Cluster Organization
Connect
Direct
Input
HCLK
CLKA
CLKB
Cluster 1
CKS
S0
Type 1 SuperCluster
Data Input
Routed
R-Cell
CKP
S1
D
PSETB
Cluster 2
CLRB
Q
Y
v2.1
To increase design efficiency and device performance,
Actel has further organized these modules into
SuperClusters (see
wide grouping of Type 1 Clusters. SuperCluster 2 is a two-
wide group containing one Type 1 Cluster and one
Type 2 Cluster. SX devices feature more SuperCluster 1
modules than SuperCluster 2 modules because designers
typically require more combinatorial logic than flip-flops.
D0
D1
D2
D3
DB
Cluster 2
Type 2 SuperCluster
SX Family FPGAs RadTolerant and HiRel
C-Cell
Figure
A0
Sa
B0
1-5). SuperCluster 1 is a two-
Cluster 1
A1
Sb
B1
Y
1-5
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