ISPLSI1032E-80LJ LATTICE [Lattice Semiconductor], ISPLSI1032E-80LJ Datasheet - Page 12

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ISPLSI1032E-80LJ

Manufacturer Part Number
ISPLSI1032E-80LJ
Description
High-Density Programmable Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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I
I
Where:
The I
loads on average exists. These values are for estimates only. Since the value of I
conditions and the program in the device, the actual I
Power consumption in the ispLSI and pLSI 1032E device
depends on two primary factors: the speed at which the
device is operating, and the number of product terms
Figure 3. Typical Device Power Consumption vs fmax
CC
CC
Maximum GRP Delay vs GLB Loads
Power Consumption
(mA) = 15 + (# of PTs * 0.59) + (# of nets * Max freq * 0.0078)
can be estimated for the ispLSI and pLSI 1032E using the following equation:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
CC
estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of four GLB
350
200
150
100
300
250
0
20
6.0
3.0
2.0
5.0
1.0
4.0
1
Notes: Configuration of eight 16-bit counters
4
40
Specifications ispLSI and pLSI 1032E
Typical current at 5V, 25 C
8
CC
60
f
max (MHz)
GLB Load
should be verified.
16
80
12
used. Figure 3 shows the relationship between power
and operating speed.
ispLSI and pLSI 1032E
100
GRP/GLB/1032E
125
32
CC
ispLSI and pLSI 1032E-70
ispLSI and pLSI 1032E-80
ispLSI and pLSI 1032E-90/100
ispLSI and pLSI 1032E-125
is sensitive to operating
150
0127/1032E

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