HT82V46 HOLTEK [Holtek Semiconductor Inc], HT82V46 Datasheet - Page 19

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HT82V46

Manufacturer Part Number
HT82V46
Description
16-Bit, 45MSPS, 3-Channel CCD/CIS Analog Signal Processor
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
Register Description
Rev. 1.10
Register 1
Register
Setup
Bit No.
5:4
0
1
2
3
6
7
PGAFS[1:0]
MODE4
Name
CDS
1CH
2CH
WS
EN
POR.
00
1
1
0
0
0
0
Global Enable
Sampling mode select
Sampling mode select
Sampling mode select
Offsets PGA output to optimize the ADC range for different polarity
sensor output signals. Zero differential PGA input signal gives:
This bit has no effect when WS=0.
Set this bit when operating in “WS” MODE 4.
Makes the HT82V46 timing to the other operating mode selection
0= complete power down
1= fully active
0= 2 or 3 channel
1= 1 channel. Input channel selected by CH[1:0] bits and unused
0= 1 or 3 channel
1= 2 channel mode. Input channels are Red and Green. Blue channel
0= 1 or 3 channel
1= 2 channel mode. Input channels are Red and Green. Blue channel
0x= Zero output from the PGA, output=32767
10= Full-scale positive output, output=65535; use for negative going
11= Full-scale negative output, output=0;
0= Other mode
1= “WS” MODE 4
0= Normal timing
1= Enable “WS” timing. Requires double rate ADCK and pixel rate
channels are powered down.
is powered down.
is powered down.
CDS2 input. CDS1 pin performs same function as RLC/ACYC pin.
video. Set INVOD=1 if zero differential input should give a
zero output code with negative going video.
use for positive going video
19
Description
November 24, 2011
HT82V46

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