HN58C1001P-15 HITACHI [Hitachi Semiconductor], HN58C1001P-15 Datasheet - Page 17

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HN58C1001P-15

Manufacturer Part Number
HN58C1001P-15
Description
1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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2. Data Protection at V
When V
trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional programming, the
EEPROM must be kept in an unprogrammable state while the CPU is in an unstable state.
Note: The EEPROM should be kept in unprogrammable state during V
The unprogrammable state can be realized by that the CPU’s reset signal inputs directly to the EEPROM’s
RES pin. RES should be kept V
The EEPROM brakes off programming operation when RES becomes low, programming operation doesn’t
finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms
after the last data input.
(1) Protection by RES
signal.
CC
is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act as a
WE
or CE
RES
V
CC
CC
CPU
RESET
V
On/Off
CC
*
Unprogrammable
SS
level during V
1 s min
Program inhibit
100 s min
CC
on/off.
10 ms min
*
Unprogrammable
Program inhibit
CC
on/off by using CPU RESET
HN58C1001 Series
17

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