HN58C1001P-15 HITACHI [Hitachi Semiconductor], HN58C1001P-15 Datasheet - Page 6

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HN58C1001P-15

Manufacturer Part Number
HN58C1001P-15
Description
1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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HN58C1001 Series
Write Cycle
Parameter
Address setup time
Address hold time
CE to write setup time (WE controlled)
CE hold time (WE controlled)
WE to write setup time (CE controlled)
WE hold time (CE controlled)
OE to write setup time
OE hold time
Data setup time
Data hold time
WE pulse width (WE controlled)
CE pulse width (CE controlled)
Data latch time
Byte load cycle
Byte load window
Write cycle time
Time to device busy
Write start time
Reset protect time
Reset high time*
Notes: 1. t
6
2. Use this device in longer cycle than this value.
3. t
4. Next read or write operation can be initiated after t
5. This parameter is sampled and not 100% tested.
6. A7 to A16 are page addresses and must be same within the page write operation.
7. See AC read characteristics.
no longer driven.
automatically completes the internal write operation within this value.
DF
WC
and t
must be longer than this value unless polling techniques or RDY/Busy are used. This device
5
DFR
are defined as the time at which the outputs achieve the open circuit conditions and are
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AS
AH
CS
CH
WS
WH
OES
OEH
DS
DH
WP
CW
DL
BLC
BL
WC
DB
DW
RP
RES
Min*
0
150
0
0
0
0
0
0
100
10
250
250
300
0.55
100
120
150*
100
1
DW
if polling techniques or RDY/Busy are used.
2
4
Typ
Max
30
10*
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
s
s
s
s
Test conditions

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