AT89S51-24SC ATMEL Corporation, AT89S51-24SC Datasheet - Page 5

• Manufacturer Part Number: AT89S51-24SC
• Description: 8-bit Microcontroller with 4K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Port 3
RST
ALE/PROG
PSEN
EA/VPP
XTAL1
XTAL2
2487B–MICRO–12/03
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (I
Port 3 receives some control signals for Flash programming and verification.
Port 3 also serves the functions of various special features of the AT89S51, as shown in the
following table.
Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The
DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default
state of bit DISRTO, the RESET HIGH out feature is enabled.
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may
be used for external timing or clocking purposes. Note, however, that one ALE pulse is
skipped during each access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,
ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled
high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution
mode.
Program Store Enable (PSEN) is the read strobe to external program memory.
When the AT89S51 is executing code from external program memory, PSEN is activated
twice each machine cycle, except that two PSEN activations are skipped during each access
to external data memory.
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to V
This pin also receives the 12-volt programming enable voltage (V
programming.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier
Port Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Alternate Functions
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (timer 0 external input)
T1 (timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
CC
for internal program executions.
IL
) because of the pull-ups.
PP
AT89S51
) during Flash
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