LMS12 LOGIC Devices Incorporated, LMS12 Datasheet
LMS12
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LMS12 Summary of contents
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... ENC 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DESCRIPTION The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated with a 26-bit adder in a single 84-pin package ideal building block for the implementation of very high- speed FIR filters for video, RADAR, and other similar applications. The ...
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... The operation of the 5-tap FIR filter implementation of Figure 1 is depicted in Table 1. The filter weights h are assumed to be latched in the B input registers of the LMS12 units. The x(n) data is applied in parallel to the A input registers of all devices. For descriptive purposes in the table, the A register contents and sum ...
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... Multiplier-Summers 08/16/2000–LDS.S12-J LMS12 9 X n n n n ...
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... Test Condition V = Min –2 Min 4 (Note 3) Ground V V (Note 12 Ground V V (Note 12) OUT CC (Notes 5, 6) (Note 7) 4 LMS12 Voltage Supply Min Typ Max Unit 2.4 V 0 0.0 0 µA 20 µ ...
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... PW t DIS HIGH IMPEDANCE 5 LMS12– Max Min Max Min Max ENA Multiplier-Summers 08/16/2000–LDS.S12-J LMS12 35 Min Max ...
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... ENA HIGH IMPEDANCE 6 LMS12 LMS12– ...
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... HRESHOLD t CC ENA OE 1 Measured V with I = –10mA and Measured V with I = –10mA and Multiplier-Summers 08/16/2000–LDS.S12-J LMS12 test, DIS C IRCUIT EVELS t DIS 3.5V Vth 0 0 Vth = 10mA OL = 10mA OL ...
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... LMS12JC35 GND Multiplier-Summers 08/16/2000–LDS.S12-J LMS12 ...
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... CREENING OMPLIANT ENC C C GND Multiplier-Summers 08/16/2000–LDS.S12-J LMS12 ...