ADUC702X Analog Devices, ADUC702X Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/0/56/analog_devices_sml.jpg)
ADUC702X
Manufacturer Part Number
ADUC702X
Description
Precision Analog Microcontroller 12-bit Analog I/O/ ARM7TDMI MCU
Manufacturer
Analog Devices
Datasheet
1.ADUC702X.pdf
(80 pages)
ADuC702x Series
PIN FUNCTION DESCRIPTIONS – ADUC7020/ADUC7021/ADUC7022
Table 3. Pin Function Descriptions
7020
38
39
40
10
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
-
-
-
-
-
Pin# ADuC702X
7021
37
38
39
40
10
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
-
-
-
-
7022
36
37
38
39
40
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
-
-
-
-
Mnemonic
ADC0
ADC1
ADC2/CMP0
ADC3/CMP1
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
GND
DAC0/ADC12
DAC1/ADC13
DAC2/ADC14
DAC3/ADC15
TMS
TDI
BM/P0.0/CMP
LAI[7]
P0.6/T1/MRST/PLA
O[3]
TCK
TDO
IOGND
IOV
LV
DGND
P0.3/TRST/ADC
RST
IRQ0/P0.4/CONV
ART
IRQ1/P0.5/ADC
/PLAO[2]
P2.0/SPM9/PLAO[
5]/CONV
P0.7/ECLK/SPM8/
PLAO[4]/XCLK
/PLAO[1]
DD
DD
REF
START
OUT
BUSY
BUSY
/P
ST
Type*
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
S
S
S
S
S
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Rev. PrB | Page 10 of 80
Function
Single-ended or differential Analog input 0
Single-ended or differential Analog input 1
Single-ended or differential Analog input 2 / Comparator Positive Input
Single-ended or differential Analog input 3 / Comparator Negative Input
Single-ended or differential Analog input 4
Single-ended or differential Analog input 5
Single-ended or differential Analog input 6
Single-ended or differential Analog input 7
Single-ended or differential Analog input 8
Single-ended or differential Analog input 9
Ground voltage reference for the ADC. For optimal performance the
analog power supply should be separated from IOGND and DGND
DAC0 Voltage Output / Single-ended or differential Analog input 12
DAC1 Voltage Output / Single-ended or differential Analog input 13
DAC2 Voltage Output / Single-ended or differential Analog input 14
DAC3 Voltage Output / Single-ended or differential Analog input 15
JTAG Test Port Input - Test Mode Select. Debug and download access
JTAG Test Port Input – Test Data In. Debug and download access
Multifunction I/O pin:
Boot Mode. The ADuC702X will enter serial download mode if BM is low
at reset and will execute code if BM is pulled high at reset through a
1kOhm resistor/ General Purpose Input-Output Port 0.0 / Voltage
Comparator Output/ Programmable Logic Array Input Element 7
Multifunction pin: driven low after reset
General Purpose Output Port 0.6 / Timer 1 Input / Power on reset output
/ Programmable Logic Array Output Element 3
JTAG Test Port Input - Test Clock. Debug and download access
JTAG Test Port Output - Test Data Out. Debug and download access
Ground for GPIO. Typically connected to DGND
3.3V Supply for GPIO and input of the on-chip voltage regulator.
2.5V. Output of the on-chip voltage regulator. Must be connected to a
0.47µF capacitor to DGND
Ground for core logic.
General Purpose Input-Output Port 0.3 / JTAG Test Port Input – Test
Reset. Debug and download access / ADC
Reset Input. (active low)
Multifunction I/O pin:
External Interrupt Request 0, active high / General Purpose Input-Output
Port 0.4 / Start conversion input signal for ADC / Programmable Logic
Array Output Element 1
Multifunction I/O pin:
External Interrupt Request 1, active high / General Purpose Input-Output
Port 0.5 / ADC
Serial Port Multiplexed:
General Purpose Input-Output Port 2.0 / UART / Programmable Logic
Array Output Element 5/ Start conversion input signal for ADC
Serial Port Multiplexed:
General Purpose Input-Output Port 0.7 / Output for External Clock signal
/ UART / Programmable Logic Array Output Element 4/ Input to the
BUSY
signal / Programmable Logic Array Output Element 2
Preliminary Technical Data
BUSY
signal output