ADUC702X Analog Devices, ADUC702X Datasheet - Page 39
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ADUC702X
Manufacturer Part Number
ADUC702X
Description
Precision Analog Microcontroller 12-bit Analog I/O/ ARM7TDMI MCU
Manufacturer
Analog Devices
Datasheet
1.ADUC702X.pdf
(80 pages)
- Current page: 39 of 80
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Preliminary Technical Data
POWER SUPPLY MONITOR
The Power Supply Monitor monitors the IOV
ADuC702x. It indicate when IOV
of two supply trip points. The monitor function is controlled via
the PSMCON register. If enabled in the IRQEN or FIQEN
register, the monitor will interrupt the core using the PSMI bit
in the PSMCON MMR. This bit will be cleared immediately
once CMP goes high.
Bit
3
2
1
0
COMPARATOR
The ADuC702x also integrates an uncommitted voltage
comparator.
The positive input is multiplexed with ADC2 and the negative
input has two options: ADC3 or DAC0. The output of the
comparator can be configured to generate a system interrupt,
can be routed directly to the Programmable Logic Array, can
start an ADC conversion or be on an external pin, CMP
Bit
15-11
10
9-8
Name
CMP
TP
PSMEN
PSMI
Name
CMPEN
CMPIN
Description
Comparator Bit
This is a read-only bit and directly reflects the state of the comparator
Read ‘1’ indicates the IOV
Read ‘0’ indicates the IOV
Trip Point Selection Bits
0 - 2.79V
1 - 3.07V
Power Supply Monitor Enable Bit
Set to ‘1’ by the user to enable the Power Supply Monitor circuit
Clear to ‘0’ by the user to disable the Power Supply Monitor circuit
Power Supply Monitor Interrupt Bit.
This bit will be set high by the MicroConverter if CMP is low, indicating low I/O supply. The PSMI Bit
can be used to interrupt the processor. Once CMP returns high, the PSMI bit may be cleared by writing
a ‘1’ to this location. A write of ‘0’ has no effect. There is no timeout delay, PSMI may be cleared
immediately once CMP goes high.
Description
Reserved
Comparator enable bit:
Set by user to enable the comparator
Cleared by user to disable the comparator
Comparator negative input select bits:
00
01
DD
supply pin drops below one
Reserved
ADC3 input
DD
Table 22: CMPCON MMR bit descriptions
Table 21: PSMCON MMR bit descriptions
supply on the
OUT
DD
DD
.
Rev. PrB | Page 39 of 80
supply is above its selected trip point.
supply is below its selected trip point.
This monitor function allows the user to save working registers
to avoid possible data loss due to the low supply or brown-out
conditions, and also ensures that normal code execution will
not resume until a safe supply level has been established.
The comparator interface consists on a 16-bit MMR, CMPCON
described below.
P0.0/CMP
ADC2/CMP0
ADC3/CMP1
OUT
DAC0
MUX
Figure 19: Comparator
ADuC702x Series
MUX
PLA
ADC START
CONVERSION
IRQ
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