SAK-C164CI-8RM Infineon Technologies AG, SAK-C164CI-8RM Datasheet - Page 18
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SAK-C164CI-8RM
Manufacturer Part Number
SAK-C164CI-8RM
Description
16-Bit Single-Chip Microcontroller
Manufacturer
Infineon Technologies AG
Datasheets
1.SAK-C164CI-8RM.pdf
(79 pages)
2.SAK-C164SL-6RM.pdf
(79 pages)
3.SAK-C164CL-8R25M.pdf
(79 pages)
- Current page: 18 of 79
- Download datasheet (2Mb)
Central Processing Unit (CPU)
The main core of the CPU consists of a 4-stage instruction pipeline, a 16-bit arithmetic
and logic unit (ALU) and dedicated SFRs. Additional hardware has been spent for a
separate multiply and divide unit, a bit-mask generator and a barrel shifter.
Based on these hardware provisions, most of the C164CI’s instructions can be executed
in just one machine cycle which requires 2 CPU clocks (4 TCL). For example, shift and
rotate instructions are always processed during one machine cycle independent of the
number of bits to be shifted. All multiple-cycle instructions have been optimized so that
they can be executed very fast as well: branches in 2 cycles, a 16 × 16 bit multiplication
in 5 cycles and a 32-/16-bit division in 10 cycles. Another pipeline optimization, the so-
called ‘Jump Cache’, reduces the execution time of repeatedly performed jumps in a loop
from 2 cycles to 1 cycle.
Figure 4
Data Sheet
ROM
CPU Block Diagram
32
Data Page Ptr.
Exec. Unit
Instr. Reg.
SYSCON
Instr. Ptr.
BUSCON 1
BUSCON 0
BUSCON 2
BUSCON 3
BUSCON 4
STKUN
STKOV
PSW
SP
Pipeline
4-Stage
Barrel - Shifter
Bit-Mask Gen
Code Seg. Ptr.
Mul/Div-HW
Context Ptr.
ADDRSEL 1
ADDRSEL 3
ADDRSEL 4
ADDRSEL 2
ALU
MDH
MDL
CPU
14
(16-bit)
Registers
Purpose
General
R15
R0
16
16
C164CL/SL
V2.0, 2001-05
C164CI/SI
Internal
RAM
R15
R0
MCB02147
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