AT88SC153-09GT-00 ATMEL Corporation, AT88SC153-09GT-00 Datasheet - Page 12

• Manufacturer Part Number: AT88SC153-09GT-00
• Description: 3 x 64 x 8 Secure Memory with Authentication
• Manufacturer: ATMEL Corporation

Answer-to-reset
Verify Password
12
AT88SC153
If RST is high during SCL clock pulse, the reset operation occurs according to the ISO
7816-10 synchronous answer-to-reset. The four bytes of the answer-to-reset register
are transmitted least significant bit first, on the 32 clock pulses provided on SCL.
The values programmed by Atmel are shown in Figure 8 below.
Figure 8. Answer-to-reset Values
Figure 9. Verify Password
Notes:
This command must be transmitted twice in sequence to successfully verify a write or
read password. The first Verify Password command can be considered an initialization
command. It will write a new bit (“0”) in the PAC corresponding to the “r” and “p” bits.
The data bits in this initialization command are ignored. The second Verify Password
command will compare the 3-byte password data presented with the corresponding
password value stored in memory. If the comparison is valid, the PAC will be cleared.
For both commands, once the command sequence is completed and a stop condition is
issued, a nonvolatile write cycle is initiated to update the associated attempts counter.
After the stop condition is issued, an ACK polling sequence with the specific command
byte of $BD will indicate the end of the write cycle and will read the attempts counter in
the configuration zone. The initialization command will result in a “0” bit in the PAC. The
second Verify Password command will read $FF in the PAC if the verification was
successful.
Pw: Password, 3 bytes.
The two bits “rp” indicate the password to compare:
r = 0: Write password
r = 1: Read password
p: Password set number
rp = 01 for the secure code
$2C
$AA
$55
$A1
1016D–SMEM–04/04