AT88SC153-09GT-00 ATMEL Corporation, AT88SC153-09GT-00 Datasheet - Page 8

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AT88SC153-09GT-00

Manufacturer Part Number
AT88SC153-09GT-00
Description
3 x 64 x 8 Secure Memory with Authentication
Manufacturer
ATMEL Corporation
Datasheet
Checksum
Authentication Register
User Zones
Security Operations
Write Lock
8
AT88SC153
Unlimited Authentication Trials (UAT): If enabled (UAT = “0”), the AAC is disabled,
allowing an unlimited number of authentication attempts. The PACs are not affected by
the UAT bit.
Unlimited Checksum Reads (UCR): If enabled (UCR = “0”), the device will allow an
unlimited number of checksums without requiring a new authentication.
Supervisor Mode Enable (SME): If enabled (SME = “0”), verification of the Write 1
password will allow the user to write and read the entire passwords zone (including the
PACs).
After a valid authentication has been completed, the internal pseudo-random generator
(PRG) will compute a secure checksum after one write command or several consecutive
write commands. This checksum certifies that the data sent by the host during the write
commands were received and therefore written in the memory. For every write com-
mand, the device clocks the data bytes into the PRG and its output is the Checksum
Authentication Register (CAR), which is a function of Ci, Gc, Q, and the data bytes
written.
After a valid authentication, any write command will enable the checksum mode and
cause AAC to become the virtual location of the 8-byte CAR. When all data have been
transmitted, the host may perform a Read CAR command by sending a read command
with the AAC address ($20). The first 8 bytes transmitted by the device form the secure
checksum.
The checksum mode allows only a single Read CAR operation for each valid authenti-
cation. The checksum mode is disabled at the end of the Read CAR command,
whatever the number of bytes transmitted, or by a read command with any other
address. The checksum mode can only be enabled once for a given authentication.
Note: During the Read CAR command, the internal address counter is incremented just
as in a normal read command. Once 8 bytes have been transmitted, the checksum
mode is automatically disabled, and if the host continues to request data, the device
responds as to a normal read command, from the address $28.
Three zones are dedicated to the user data. The access rights of each zone are pro-
grammable separately via the access registers. If several zones share the same
password set, this set will be entered only once (after the part is powered up), so several
zones might be combined in one larger zone.
If a user zone is configured in the write lock mode (access register bit 2), the lowest
address byte of a page constitutes a write access byte for the bytes of that page.
Table 8. Write Lock
Example: The write lock byte (WLB) at $00 controls the bytes from $00 to $07.
The WLB can also lock itself by writing its least significant (right most) bit to “0”. The
WLB can only be programmed, i.e., bits written to “0” cannot return to “1”.
11011001
$0 - WLB
Lock
x x
$1
Lock
x x
$2
x x
$3
x x
$4
Lock
x x
$5
x x
$6
1016D–SMEM–04/04
x x
$7
$00
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