M24128 STMicroelectronics, M24128 Datasheet - Page 10

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M24128

Manufacturer Part Number
M24128
Description
256/128 Kbit Serial IC Bus EEPROM Without Chip Enable Lines
Manufacturer
STMicroelectronics
Datasheet

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M24256, M24128
Table 10. AC Characteristics
Note: 1. For a reSTART condition, or following a write cycle.
cremented. The master terminates the transfer
with a STOP condition, as shown in Figure 8, with-
out acknowledging the byte output.
Sequential Read
This mode can be initiated with either a Current
Address Read or a Random Address Read. The
master does acknowledge the data byte output in
this case, and the memory continues to output the
next byte in sequence. To terminate the stream of
bytes, the master must not acknowledge the last
byte output, and must generate a STOP condition.
The output data comes from consecutive address-
es, with the internal address counter automatically
incremented after each byte output. After the last
memory address, the address counter ‘rolls-over’
and the memory continues to output data from
memory address 00h.
10/16
Symbol
t
t
DH1DH2
t
DL1DL2
t
t
t
CH1CH2
CL1CL2
CHDX
t
t
t
t
t
t
CLQV
t
t
DXCX
CHDH
CHCL
CLDX
CLCH
DHDL
CLQX
DLCL
t
f
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
W
C
3
1
2
2
t
t
t
t
t
SU:STA
HD:STA
HD:DAT
SU:DAT
SU:STO
t
t
Alt.
t
f
HIGH
t
LOW
t
t
BUF
SCL
t
t
WR
t
t
DH
AA
R
R
F
F
Clock Rise Time
Clock Fall Time
SDA Rise Time
SDA Fall Time
Clock High to Input Transition
Clock Pulse Width High
Input Low to Clock Low (START)
Clock Low to Input Transition
Clock Pulse Width Low
Input Transition to Clock Transition
Clock High to Input High (STOP)
Input High to Input Low (Bus Free)
Clock Low to Data Out Valid
Data Out Hold Time After Clock Low
Clock Frequency
Write Time
Parameter
Acknowledge in Read Mode
In all read modes, the memory waits, after each
byte read, for an acknowledgment during the 9
bit time. If the master does not pull the SDA line
low during this time, the memory terminates the
data transfer and switches to its stand-by state.
V
T
Min
600
600
600
100
600
200
200
1.3
1.3
CC
20
20
A
0
=–40 to 85°C
=4.5 to 5.5 V
M24256 / M24128
Max
300
300
300
300
900
400
10
V
T
Min
600
600
600
100
600
200
200
1.3
1.3
CC
20
20
A
0
=–40 to 85°C
=2.5 to 5.5 V
Max
300
300
300
300
900
400
10
Unit
kHz
ms
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
µs
ns
ns
th

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