XC18Vxxx Xilinx, XC18Vxxx Datasheet - Page 12

• Manufacturer Part Number: XC18Vxxx
• Description: In-System Programmable Configuration PROMs
• Manufacturer: Xilinx

XC18V00 Series In-System Programmable Configuration PROMs
Reset Activation
On power up, OE/RESET is held low until the XC18V00 is
active (1 ms). OE/RESET is connected to an external resis-
tor to pull OE/RESET HIGH releasing the FPGA INIT and
allowing configuration to begin. If the power drops below
2.0V, the PROM resets. OE/RESET polarity is not program-
mable. See
Standby Mode
The PROM enters a low-power standby mode whenever
CE is asserted High. The address is reset. The output
Table 7: Truth Table for PROM Control Inputs
12
Notes:
1.
OE/RESET
3.6V
3.0V
0V
TC = Terminal Count = highest address value. TC + 1 = address 0.
0ms
Control Inputs
High
High
Low
Low
Figure 8: V
1ms
Figure 8
Recommended
Time
V
CCINT
Recommended Operating Range
High
High
Low
Low
CCINT
CE
Time (ms)
for power-up requirements.
Rise
Power-Up Requirements
If address > TC
If address < TC
50ms
Internal Address
Held reset
Held reset
Held reset
(1)
ds026_10_061103
(1)
: don’t change
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: increment
remains in a high-impedance state regardless of the state of
the OE input. JTAG pins TMS, TDI and TDO can be in a
high-impedance state or High. See
5V Tolerant I/Os
The I/Os on each re-programmable PROM are fully 5V tol-
erant even through the core power supply is 3.3V. This
allows 5V CMOS signals to connect directly to the PROM
inputs without damage. In addition, the 3.3V V
supply can be applied before or after 5V signals are applied
to the I/Os. In mixed 5V/3.3V/2.5V systems, the user pins,
the core power supply (V
ply (V
makes the PROM devices immune to power supply
sequencing issues.
Customer Control Bits
The XC18V00 PROMs have various control bits accessible
by the customer. These can be set after the array has been
programmed using “Skip User Array” in Xilinx iMPACT soft-
ware. The iMPACT software can set these bits to enable the
optional JTAG read security, parallel configuration mode, or
CF-->D4 pin function. See
CCO
) can have power applied in any order. This
High-Z
High-Z
High-Z
High-Z
Active
DATA
CCINT
Table
), and the output power sup-
Outputs
7.
DS026 (v4.0) June 11, 2003
CEO
High
High
High
High
Low
Table
Product Specification
7.
CCINT
Reduced
Standby
Standby
Active
Active
I
CC
power
R