HIP6014 Intersil Corporation, HIP6014 Datasheet - Page 8

• Manufacturer Part Number: HIP6014
• Description: Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
• Manufacturer: Intersil Corporation

The modulator transfer function is the small-signal transfer
function of V
Gain and the output filter (L
break frequency at F
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage V
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6014) and the impedance networks Z
and Z
a closed loop transfer function with the highest 0dB crossing
frequency (f
is the difference between the closed loop phase at f
180 degrees The equations below relate the compensation
network’s poles, zeros and gain to the components (R
R
locating the poles and zeros of the compensation network:
Compensation Break Frequency Equations
Figure 8 shows an asymptotic plot of the DC-DC converter’s
gain vs. frequency. The actual Modulator Gain has a high gain
peak due to the high Q factor of the output filter and is not
shown in Figure 8. Using the above guidelines should give a
Compensation Gain similar to the curve plotted. The open
loop error amplifier gain bounds the compensation gain.
Check the compensation gain at F
the error amplifier. The Closed Loop Gain is constructed on
the log-log graph of Figure 8 by adding the Modulator Gain (in
dB) to the Compensation Gain (in dB). This is equivalent to
multiplying the modulator transfer function to the
compensation transfer function and plotting the gain.
The compensation gain uses external impedance networks
Z
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
F LC
F
F
1. Pick Gain (R
2. Place 1
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error Amplifier’s Open-Loop Gain
7. Estimate Phase Margin - Repeat if Necessary
FB
3
Z1
Z2
, C
=
and Z
=
=
FB
1
--------------------------------------- -
2
-------------------------------- -
2
--------------------------------------------------- -
2
, C
. The goal of the compensation network is to provide
2
IN
ST
R
, and C
ND
ST
ND
0dB
1
L O C O
R
OUT
1
to provide a stable, high bandwidth (BW) overall
2
1
Zero Below Filter’s Double Pole (~75% F
Pole at the ESR Zero
Zero at Filter’s Double Pole
Pole at Half the Switching Frequency
1
+
) and adequate phase margin. Phase margin
C
2
/V
R
1
/R
3
3
E/A
) in Figure 7. Use these guidelines for
1
LC
) for desired converter bandwidth
C
. This function is dominated by a DC
3
and a zero at F
O
F ESR
F
F
and C
8
P1
P2
P2
OSC
=
=
=
O
---------------------------------------------------- -
2
-------------------------------- -
2
with the capabilities of
---------------------------------------- -
2
), with a double pole
.
ESR
R
R
ESR C O
1
2
3
IN
. The DC Gain of
1
1
) divided by the
C
C
-------------------- -
C
3
1
1
+
C
C
0dB
2
2
LC
1
, R
and
)
IN
2
HIP6014
,
Component Selection Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
Modern microprocessors produce transient load rates
above 1A/ns. High frequency capacitors initially supply the
transient and slow the current load rate seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (effective series resistance) and
voltage rating requirements rather than actual capacitance
requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements. For example, Intel
recommends that the high frequency decoupling for the
Pentium Pro be composed of at least forty (40) 1 F ceramic
capacitors in the 1206 surface-mount package.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple
voltage and the initial voltage drop after a high slew-rate
transient. An aluminum electrolytic capacitor’s ESR value is
related to the case size with lower ESR available in larger
case sizes. However, the equivalent series inductance
(ESL) of these capacitors increases with case size and can
reduce the usefulness of the capacitor to high slew-rate
transient loading. Unfortunately, ESL is not a specified
parameter. Work with your capacitor supplier and measure
the capacitor’s impedance with frequency to select a
FIGURE 8. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
100
-20
-40
-60
80
60
40
20
0
10
(R
20LOG
2
MODULATOR
/R
1
)
GAIN
100
1K
F
Z1
F
FREQUENCY (Hz)
LC
F
Z2
10K
F
F
P1
ESR
(V
100K
IN
20LOG
F
/ V
P2
OSC
OPEN LOOP
ERROR AMP GAIN
1M
)
COMPENSATION
CLOSED LOOP
10M
GAIN
GAIN