HIP6017 Intersil Corporation, HIP6017 Datasheet - Page 10

• Manufacturer Part Number: HIP6017
• Description: Advanced PWM and Dual Linear Power Control
• Manufacturer: Intersil Corporation

layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying the full load current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET (and/or parallel Schottky
diode). Any inductance in the switched current path
generates a large voltage spike during the switching interval.
Careful component selection, tight layout of the critical
components, and short, wide circuit traces minimize the
magnitude of voltage spikes. Contact Intersil for evaluation
board drawings of the component placement and printed
circuit board.
There are two sets of critical components in a DC-DC
converter using a HIP6017 controller. The power
components are the most critical because they switch large
amounts of energy. The critical small signal components
connect to sensitive nodes or supply critical bypassing
current.
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors and
the power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the soft-start capacitor, C
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from SS node
because the internal current source is only 11 A.
A multi-layer printed circuit board is recommended.
Figure 10 shows the connections of the critical components
in the converter. Note that capacitors CIN and COUT could
each represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. The
power plane should support the input power and output
power nodes. Use copper filled polygons on the top and
bottom circuit layers for the phase nodes. Use the remaining
printed circuit layers for small signal wiring. The wiring traces
from the control IC to the MOSFET gate and source should
be sized to carry 1A currents. The traces for OUT2 need only
be sized for 0.2A. Locate C
PWM Controller Feedback Compensation
Both PWM controllers use voltage-mode control for output
regulation. This section highlights the design consideration
for a voltage-mode controller. Apply the methods and
considerations to both PWM controllers.
2-219
OUT2
close to the HIP6017 IC.
SS
. Locate
HIP6017
Figure 11 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage is
regulated to the reference voltage level. The reference voltage
level is the DAC output voltage for the PWM controller. The
error amplifier output (V
(OSC) triangular wave to provide a pulse-width modulated
wave with an amplitude of V
wave is smoothed by the output filter (L
+5V
+3.3V
V
FIGURE 10. PRINTED CIRCUIT BOARD POWER PLANES AND
FIGURE 11. VOLTAGE-MODE BUCK CONVERTER
OUT2
V
OSC
V
IN
OUT3
IN
OSC
Q3
ERROR
ISLANDS
COMPENSATION DESIGN
C
C
AMP
HIP6017
IN
OUT2
V
E/A
COMP
DETAILED FEEDBACK COMPENSATION
PWM
Z
+
-
COMP
+
+12V
-
FB
C1
REFERENCE
KEY
E/A
GATE3
REFERENCE
VIN2
VOUT2
C
VCC
SS
C2
) is compared with the oscillator
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
+
HIP6018
IN
-
DRIVER
DRIVER
R2
C
SS PGND
at the PHASE node. The PWM
VCC
UGATE1
PHASE1
Z
LGATE1
OCSET1
IN
GND
Z
FB
FB
V
Q1
Q2
O
C
IN
PHASE
OCSET1
and C
C3
(PARASITIC)
Z
R1
L
IN
O
R
L
CR1
O
OCSET1
R3
OUT1
C
).
OUT1
ESR
V
C
OUT
O
V
V
OUT1
OUT