T89C5115 ATMEL Corporation, T89C5115 Datasheet - Page 19

• Manufacturer Part Number: T89C5115
• Description: Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory
• Manufacturer: ATMEL Corporation

Exiting Power-down Mode
Figure 6. Power-down Exit Waveform Using INT1:0#
4128A–8051–04/02
INT1:0#
OSC
Active phase
Note:
There are two ways to exit the Power-down mode:
1. Generate an enabled external interrupt.
Notes:
2. Generate a reset.
Notes:
–
–
If VDD was reduced during the Power-down mode, do not exit Power-down mode until
VDD is restored to the normal operating level.
The T89C5115 provides capability to exit from Power-down using INT0#,
INT1#.
Hardware clears PD bit in PCON register which starts the oscillator and
restores the clocks to the CPU and peripherals. Using
resumes when the input is released (see Figure 6). Execution resumes with
the interrupt service routine. Upon completion of the interrupt service
routine, program execution resumes with the instruction immediately
following the instruction that activated Power-down mode.
1. The external interrupt used to exit Power-down mode must be configured as level
2. Exit from power-down by external interrupt does not affect the
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU
and peripherals. Program execution momentarily resumes with the
instruction immediately following the instruction that activated Power-down
mode and may continue for a number of clock cycles before the internal
reset algorithm takes control. Reset initializes the T89C5115 and vectors the
CPU to address 0000h.
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
2. Exit from power-down by reset redefines all the
Power-down phase
sensitive (INT0# and INT1#) and must be assigned the highest priority. In addition,
the duration of the interrupt must be long enough to allow the oscillator to stabilize.
The execution will only resume when the interrupt is deasserted.
RAM content.
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
RAM content.
Oscillator restart phase
SFRs
Active phase
, but does not affect the internal
INTx
# input, execution
T89C5115
SFRs
nor the internal
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