T89C5115 ATMEL Corporation, T89C5115 Datasheet - Page 32
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T89C5115
Manufacturer Part Number
T89C5115
Description
Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
1.T89C5115.pdf
(105 pages)
- Current page: 32 of 105
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Status of the Flash Memory
Selecting FM1
Loading the Column Latches
32
T89C5115
The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.
Any number of data from 1 byte to 128 bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 12:
•
•
•
•
•
•
Disable interrupt and map the column latch space by setting FPS bit.
Load the DPTR with the address to load.
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
If needed loop the three last instructions until the page is completely loaded.
unmap the column latch and Enable Interrupt
Interrupts that may occur during programming time must be disabled to avoid any spuri-
ous exit of the programming mode.
4128A–8051–04/02
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