P89LV51RD2 Philips Semiconductors, P89LV51RD2 Datasheet - Page 77

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P89LV51RD2

Manufacturer Part Number
P89LV51RD2
Description
8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Contents
1
2
3
3.1
4
5
5.1
5.2
6
7
7.1
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
7.1.8
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.5.6
7.5.7
7.5.8
7.5.9
7.6
7.6.1
© Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 11 October 2004
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Special function registers . . . . . . . . . . . . . . . . 10
Functional description . . . . . . . . . . . . . . . . . . 14
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7
Memory organization . . . . . . . . . . . . . . . . . . . 14
Flash program memory bank selection. . . . . . 14
Power-on reset code execution. . . . . . . . . . . . 14
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 15
Brown-out detect reset . . . . . . . . . . . . . . . . . . 15
Watchdog reset. . . . . . . . . . . . . . . . . . . . . . . . 16
Data RAM memory . . . . . . . . . . . . . . . . . . . . . 16
Expanded data RAM addressing . . . . . . . . . . 16
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . 19
Flash memory In-Application Programming . . 20
Flash organization . . . . . . . . . . . . . . . . . . . . . 20
Boot block (Block 1) . . . . . . . . . . . . . . . . . . . . 20
In-System Programming (ISP) . . . . . . . . . . . . 20
Using the In-System Programming. . . . . . . . . 21
Using the serial number . . . . . . . . . . . . . . . . . 25
In-Application Programming method . . . . . . . 25
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . 27
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Capture mode . . . . . . . . . . . . . . . . . . . . . . . . . 32
Auto-reload mode (up or down counter) . . . . . 33
Programmable clock-out . . . . . . . . . . . . . . . . . 35
Baud rate generator mode . . . . . . . . . . . . . . . 36
Summary of baud rate equations . . . . . . . . . . 37
UARTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . 39
More about UART mode 1 . . . . . . . . . . . . . . . 39
More about UART modes 2 and 3 . . . . . . . . . 40
Multiprocessor communications . . . . . . . . . . . 40
Automatic address recognition . . . . . . . . . . . . 40
Serial peripheral interface. . . . . . . . . . . . . . . . 42
SPI features . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Document order number: 9397 750 14101
7.6.2
7.7
7.8
7.8.1
7.8.2
7.8.3
7.8.4
7.8.5
7.9
7.10
7.11
7.11.1
7.11.2
7.12
7.12.1
7.12.2
8
9
10
11
11.1
12
13
14
15
16
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 62
Recommended operating conditions . . . . . . 62
Static characteristics . . . . . . . . . . . . . . . . . . . 64
Dynamic characteristics . . . . . . . . . . . . . . . . . 66
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 72
Revision history . . . . . . . . . . . . . . . . . . . . . . . 75
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 76
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
SPI description . . . . . . . . . . . . . . . . . . . . . . . . 42
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 45
Programmable Counter Array (PCA) . . . . . . . 46
PCA capture mode. . . . . . . . . . . . . . . . . . . . . 50
16-bit software timer mode. . . . . . . . . . . . . . . 51
High speed output mode . . . . . . . . . . . . . . . . 52
Pulse width modulator mode . . . . . . . . . . . . . 53
PCA Watchdog timer . . . . . . . . . . . . . . . . . . . 53
Security Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Interrupt priority and polling sequence . . . . . . 54
Power-saving modes . . . . . . . . . . . . . . . . . . . 58
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Power-down mode . . . . . . . . . . . . . . . . . . . . . 59
System clock and clock options . . . . . . . . . . . 60
Clock Input Options and
Clock doubling option . . . . . . . . . . . . . . . . . . . 61
Explanation of symbols . . . . . . . . . . . . . . . . . 67
Recommended Capacitor Values for
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
8-bit microcontrollers with 80C51 core
P89LV51RD2

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