ispPAC10-01PI Lattice Semiconductor, ispPAC10-01PI Datasheet - Page 4

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ispPAC10-01PI

Manufacturer Part Number
ispPAC10-01PI
Description
In-System Programmable Analog Circuit
Manufacturer
Lattice Semiconductor
Datasheet
T
*Note: During device JTAG programming, analog outputs will stop responding to normal input stimulus. This is because all
configuration information is erased and then re-written as part of a normal programming cycle, momentarily disrupting the input
to output signal path. Behavior is not predictable during either of these steps since the analog outputs are not clamped during
a programming cycle. Usually, however, the outputs will slew to either 0V (Ground) or 5V (V
behavior is partially determined by conditions existing immediately prior to device reprogramming and intermediate configura-
tions that occur during the process.
Timing Specifications
SYMBOL
Dynamic Performance
A
tpwcal1
tpwcal2
tcalmin
trstmin
= 25 C; V
tckmin
TCK
TMS
TDI
TDO
tdozx
tdoxz
tmsh
tmss
tpwp
tpwe
tdov
tckh
tdis
tdih
tckl
S
Minimum Clock Period
TCK High Time
TCK Low Time
TMS Setup Time
TMS Hold Time
TDI Setup Time
TDI Hold Time
TDO Float to Valid Delay
TDO Valid Delay
TDO Valid to Float Delay
Minimum reset pulse width
Time for a programming operation
Time for an erase operation
Time for auto-cal operation on power-up
Minimum auto-cal pulse width
Time for user initiated auto-cal operation
tmss
= +5.0V (Unless otherwise specified).
tdis
tdozx
tmsh
tdih
tckh
PARAMETER
tdov
tckl
tckmin
tdoxz
Automatically executed at power-up
Executed on rising edge of CAL
Executed in Run-Test/Idle
Executed in Run-Test/Idle
4
CONDITION
CAL
V OUT
TCK
TMS
tmss
Specifications ispPAC10
tcalmin
*(PRGUSR/UBE executed in
Run-Test/Idle state)
tpwcal1, tpwcal2
V OUT = 0V DIFF
MIN.
200
80
80
50
50
15
10
15
10
40
40
tpwp, tpwe
(Note: CAL internally
initiated at device turn-on.)
supply
) or 2.5V (VREF
TYP.
tmss
MAX.
100
100
250
100
60
60
60
OUT
UNITS
). This
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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