AM29F100B-120DGC Advanced Micro Devices, AM29F100B-120DGC Datasheet
AM29F100B-120DGC
Related parts for AM29F100B-120DGC
AM29F100B-120DGC Summary of contents
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FINAL Am29F100 1 Megabit (128 K x 8-bit/ 16-bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — 5.0 V 10% for read, erase, and program operations — Simplifies system-level power requirements High ...
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GENERAL DESCRIPTION The Am29F100 Mbit, 5.0 Volt-only Flash memory organized as 131,072 bytes or 65,536 words. The Am29F100 is offered in 44-pin SO and 48-pin TSOP packages. Word-wide data appears on DQ0-DQ15; byte-wide data on DQ0-DQ7. The ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Option (V = 5.0 V 10%) CC Max Access Time (ns) CE# Access (ns) OE# Access (ns) Note: See the AC Characteristics section for full specifications. BLOCK DIAGRAM RY/BY# Buffer ...
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CONNECTION DIAGRAMS 1 A15 A14 2 3 A13 A12 4 5 A11 6 A10 WE# 12 RESET RY/BY ...
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CONNECTION DIAGRAMS NC RY/BY CE OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 PIN CONFIGURATION A0–A15 = 16 Addresses DQ0–DQ14 = 15 Data Inputs/Outputs DQ15/A-1 = DQ15 (Data ...
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... AM29F100T-70, AM29F100B-70 AM29F100T-90, EC, EI, EE, AM29F100B-90 FC, FI, FE, AM29F100T-120, AM29F100B-120 AM29F100T-150, AM29F100B-150 Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. SC, SI, SE ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is composed of latches ...
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An erase operation can erase one sector, multiple sec- tors, or the entire device. The Sector Address Tables indicate the address space that each sector occupies. A “sector address” consists of the address bits required to uniquely select a sector. ...
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... Table 2. Sector Addresses Tables (Am29F100T) A15 A14 SA0 0 X SA1 1 0 SA2 1 1 SA3 1 1 SA4 1 1 Table 3. Sector Addresses Tables (Am29F100B) A15 A14 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 1 SA4 1 X Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7– ...
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Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hardware sector unprotection feature re-enables both program and erase operations in previously pro- tected sectors. Sector protection/unprotection must be implemented using programming equipment. ...
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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to the Command Defi- nitions table). In addition, the following hardware data protection measures prevent accidental erasure or pro- ...
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Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is protected. The Command Definitions table shows the address and data requirements. This method is ...
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Chip Erase Command Sequence Chip erase is a six-bus-cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command, ...
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After the erase operation has been suspended, the system can read array data from or program data to any sector not selected for erasure. (The device “erase suspends” all sectors selected ...
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Command Sequence (Note 1) Read (Note 5) 1 Reset (Note 6) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector Protect Verify 4 (Note 8) ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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See also the “Sector Erase Command Se- quence” section. After the sector erase command sequence is written, the system should read the status on DQ7 (Data# Poll- ing) or DQ6 (Toggle Bit I) to ensure the device ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Suspended Mode Sector Erase-Suspend-Program Notes: 1. DQ7 requires a valid address when reading status information. Refer to the appropriate subsection for ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +125 C Ambient Temperature with Power Applied . . . . . . . . ...
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DC CHARACTERISTICS TTL/NMOS Compatible Parameter Symbol Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current Active Current (Note 1) CC1 Active Current (Notes 2, 3) CC2 ...
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DC CHARACTERISTICS (continued) CMOS Compatible Parameter Symbol Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current Active Current (Note 1) CC1 Active Current (Notes 2, 3) ...
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TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 8. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted Table 7. Test Specifications 5.0 V Test Condition Output Load 2.7 ...
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AC CHARACTERISTICS Read-only Operations Characteristics Parameter Symbol JEDEC Std. Parameter Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std. Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...
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AC CHARACTERISTICS Erase and Program Operations Parameter Symbol JEDEC Standard t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH DS ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std. Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested RESET ...
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AC CHARACTERISTICS Erase and Program Operations Alternate CE# Controlled Writes Parameter Symbol JEDEC Standard t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes Program Address Program Data Sector Address, DQ7# = Complement ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Chip/Sector Erase Time Byte Programming Time Word Programming Time Chip Programming Time (Note 3) Notes: 1. Typical program and erase times assume the following conditions 5 programming typicals assume checkerboard pattern. ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 34 23 13.10 15.70 13.50 16.30 22 2.80 MAX. SEATING PLANE 0.10 0.35 Am29F100 0.10 0.21 ...
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PHYSICAL DIMENSIONS TS 048—48-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC TSR048—48-Pin Reverse Thin Small Outline Package (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") ...
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... Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...