AM29F100B-120DGC Advanced Micro Devices, AM29F100B-120DGC Datasheet - Page 36

• Manufacturer Part Number: AM29F100B-120DGC
• Description: 1 Megabit (128 K x 8-Bit/64 K x 16-Bit) CMOS 5.0 Volt-only/ Boot Sector Flash Memory-Die Revision 1
• Manufacturer: Advanced Micro Devices

REVISION SUMMARY FOR AM29F100
Revision B+1
Product Selector Guide
Replaced the -75 column (70 ns, 5%) with the -70 col-
umn (70 ns, 10%).
Ordering Information, Standard Products
The -70 designation is now listed in the part number ex-
ample.
Valid Combinations: Replaced the -75 combinations
with -70. The 70 ns speed grade is now available in the
same combinations as the other speed grades.
Operating Ranges
V
to -70.
AC Characteristics
Read Only Operations: Changed the -75 column head
to -70. All parameters remain the same.
Figure 7, Test Conditions: Changed C
75 to -70.
Write/Erase/Program Operations: Changed the -75
column head to -70. Changed byte programming and
chip/sector erase times (t
tively).
Switching Waveforms
Temporary Sector Unprotect Timing Diagram, Figure
18: Corrected the top waveform. RESET# begins at 0
V, then rises to 12 V in t
AC Characteristics
Alternate CE# Controlled Writes: Changed the -75 col-
umn head to -70. Changed byte programming and
Trademarks
Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved.
AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.
ExpressFlash is a trademark of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
36
CC
Supply Voltages: Changed the -75 designation
VIDR
WHWH1
.
and t
L
WHWH2
in Note 1 from -
, respec-
Am29F100
chip/sector erase times (t
tively).
Erase and Programming Performance
Combined sector and chip erase times, added word
programming times and erase/program cycle times.
Updated specifications.
Revision C
Global
Made formatting and layout consistent with other data
sheets. Used updated common tables and diagrams.
Revision C+1
Table 5, Command Definitions
Address bits A0–A14 are required for unlock cycles.
Therefore, addresses for second and fifth write cycles
are 2AAAh in word mode and 5555h in byte mode. Ad-
dresses for first, third, fourth, and sixth cycles are
5555h in word mode and AAAAh in byte mode. Read
cycles are not affected. Deleted Note 5 to reflect the
correction.
Revision C+2
AC Characteristics
Erase/Program Operations; Erase and Program Oper-
ations Alternate CE# Controlled Writes: Corrected the
notes reference for t
eters are 100% tested. Corrected the note reference
for t
Temporary Sector Unprotect Table
Added note reference for t
100% tested.
VCS
. This parameter is not 100% tested.
WHWH1
WHWH1
VIDR
and t
. This parameter is not
WHWH2
and t
WHWH2
. These param-
, respec-