73K224BL-IGT ETC, 73K224BL-IGT Datasheet - Page 10

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73K224BL-IGT

Manufacturer Part Number
73K224BL-IGT
Description
Single-Chip Modem w/ Integrated Hybrid
Manufacturer
ETC
Datasheet
73K224BL
V.22bis/V.22/V.21/Bell 212A/103
Single-Chip Modem w/ Integrated Hybrid
CONTROL REGISTER 0
BIT
D0
D1
D5,D4
D3,D2
D6,D5
ADDR
CR0
000
MODUL.
OPTION
D7
Modulation
Originate
Transmit
Transmit
Answer/
Enable
NAME
MODUL.
Mode
Type
TYPE 1
D6
MODUL.
TYPE 0
D5
0
0
0
1
0
D5 D4 D3 D2
0
0
0
0
CONDITION
D6 D5
1
1
1
0
0
0
1
1
0
0
X
0
0
1
0
1
TRANSMIT
MODE 2
0
0
1
1
1
0
1
1
0
0
0
0
D4
0
1
0
1
1
0
0
0
1
10
DESCRIPTION
Selects Power down mode. All functions disabled except
Selects answer mode (transmit in high band, receive
in low band).
Selects originate mode (transmit in low band, receive in
high band).
Disables transmit output at TXA1 & TXA2
Enables transmit output at TXA1 & TXA2
Note: Transmit enable must be set to 1 to allow
activation of answer tone or DTMF.
digital interface..
Internal synchronous mode in this mode TXCLK is an
internally derived 600,1200 or 2400 Hz signal. Serial
input data appearing at TXD must be valid on the rising
edge of TXCLK. Receive data is clocked out of RXD on
the falling edge of RXCLK.
External synchronous mode. Operation is identical to
internal synchronous, but TXCLK is connected internally
to EXCLK pin, and a 600, 1200 or 2400 Hz clock must be
supplied externally.
Slave synchronous mode Same operation as other
synchronous modes TXCLK is connected internally to
the RXCLK pin in this mode.
Selects a synchronous mode 8 bits/character (1 start bit,
6 data bits, 1 stop bit).
Selects asynchronous mode - 9 bits/character (1 start bit,
7 data bits, 1 stop bit).
Selects asynchronous mode - 10 bits/character (1 start
bit, 8 data bits, 1 stop bit).
Selects asynchronous mode - 11 bits/character (1 start
bit, 8 data bits, 1 stop bit) or 2 stop bits)..
Selects FSK operation.
QAM
DPSK
FSK
TRANSMIT
MODE 1
D3
TRANSMIT
MODE 0
D2
TRANSMIT
ENABLE
D1
ORIGINATE
ANSWER/
D0

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