AM79C972BKCW Advanced Micro Devices, AM79C972BKCW Datasheet - Page 126
AM79C972BKCW
Manufacturer Part Number
AM79C972BKCW
Description
PCnet-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C972BKCW.pdf
(130 pages)
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CSR40: Current Receive Byte Count
Bit
31-16
15-12
11-0
CSR41: Current Receive Status
Bit
31-16
15-0
CSR42: Current Transmit Byte Count
Bit
31-16
15-12
11-0
126
Name
RES
RES
CRBC
Name
RES
CRST
Name
RES
RES
CXBC
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
Current Receive Byte Count.
This field is a copy of the BCNT
field of RMD1 of the current re-
ceive descriptor.
Description
Reserved locations. Written as
zeros and read as undefined.
Current Receive Status. This
field is a copy of bits 31-16 of
RMD1 of the current receive de-
scriptor.
Description
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
Current Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the current trans-
mit descriptor.
Am79C972
CSR43: Current Transmit Status
Bit
31-16 RES
15-0
CSR44: Next Receive Byte Count
Bit
31-16 RES
15-12 RES
11-0
CSR45: Next Receive Status
Bit
31-16 RES
15-0
CXST
NRBC
NRST
Name
Name
Name
Reserved locations. Written as
Reserved locations. Written as
Next Receive Byte Count. This
Reserved locations. Written as
Next Receive Status. This field is
zeros and read as undefined.
Current Transmit Status. This
field is a copy of bits 31-16 of
TMD1 of the current transmit de-
scriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
field is a copy of the BCNT field of
RMD1 of the next receive de-
scriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
zeros and read as undefined.
a copy of bits 31-16 of RMD1 of
the next receive descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Description
Description
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