AM79C972BKCW Advanced Micro Devices, AM79C972BKCW Datasheet - Page 26

• Manufacturer Part Number: AM79C972BKCW
• Description: PCnet-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
• Manufacturer: Advanced Micro Devices

BASIC FUNCTIONS
System Bus Interface
The Am79C972 controller is designed to operate as a
bus master during normal operations. Some slave I/O
accesses to the Am79C972 controller are required in
nor mal operations as well. Initialization of the
Am79C972 controller is achieved through a combina-
tion of PCI Configuration Space accesses, bus slave
accesses, bus master accesses, and an optional read
of a ser ial EEPROM that is perfor med by the
Am79C972 controller. The EEPROM read operation is
performed through the 93C46 EEPROM interface. The
ISO 8802-3 (IEEE/ANSI 802.3) Ethernet Address may
reside within the serial EEPROM. Some Am79C972
controller configuration registers may also be pro-
grammed by the EEPROM read operation.
The Address PROM, on-chip board-configuration reg-
isters, and the Ethernet controller registers occupy 32
bytes of address space. I/O and memory mapped I/O
accesses are supported. Base Address registers in the
PCI configuration space allow locating the address
space on a wide variety of starting addresses.
For diskless stations, the Am79C972 controller sup-
ports a ROM or Flash-based (both referred to as the
Expansion ROM throughout this specification) boot de-
vice of up to 1 Mbyte in size. The host can map the boot
device to any memory address that aligns to a 1-Mbyte
boundary by modifying the Expansion ROM Base Ad-
dress register in the PCI configuration space.
Software Interface
The software interface to the Am79C972 controller is
divided into three parts. One part is the PCI configura-
tion registers used to identify the Am79C972 controller
and to setup the configuration of the device. The setup
information includes the I/O or memory mapped I/O
base address, mapping of the Expansion ROM, and
the routing of the Am79C972 controller interrupt chan-
nel. This allows for a jumperless implementation.
The second portion of the software interface is the di-
rect access to the I/O resources of the Am79C972 con-
troller. The Am79C972 controller occupies 32 bytes of
address space that must begin on a 32-byte block
boundary. The address space can be mapped into I/O
26
Am79C972
or memory space (memory mapped I/O). The I/O Base
Address Register in the PCI Configuration Space con-
trols the start address of the address space if it is
mapped to I/O space. The Memory Mapped I/O Base
Address Register controls the start address of the ad-
dress space if it is mapped to memory space. The 32-
byte address space is used by the software to program
the Am79C972 controller operating mode, to enable
and disable various features, to monitor operating sta-
tus, and to request particular functions to be executed
by the Am79C972 controller.
The third portion of the software interface is the de-
scriptor and buffer areas that are shared between the
software and the Am79C972 controller during normal
network operations. The descriptor area boundaries
are set by the software and do not change during nor-
mal network operations. There is one descriptor area
for receive activity and there is a separate area for
transmit activity. The descriptor space contains relocat-
able pointers to the network frame data, and it is used
to transfer frame status from the Am79C972 controller
to the software. The buffer areas are locations that hold
frame data for transmission or that accept frame data
that has been received.
Network Interfaces
The Am79C972 controller can be connected to an
IEEE 802.3 or proprietary network via one of two net-
work interfaces. The Media Independent Interface (MII)
provides an IEEE 802.3-compliant nibble-wide inter-
face to an external 100- and/or 10-Mbps transceiver
device. The General Purpose Serial Interface (GPSI) is
functionally equivalent to the GPSI found on the
LANCE.
While in auto-selection mode, the interface in use is de-
termined by the Network Port Manager. If the quiescent
state of the MII MDIO pin is HIGH, the MII is activated.
The GPSI port can only be enabled by disabling the
auto-selection and manually selecting the GPSI as the
network port.
The Am79C972 controller supports both half-duplex
and full-duplex operation on network interfaces (i.e.,
GPSI and MII).