HI-8583 Holt Integrated Circuits, HI-8583 Datasheet - Page 2

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HI-8583

Manufacturer Part Number
HI-8583
Description
(HI-8582 / HI-8583) ARINC 429 SYSTEM ON A CHIP
Manufacturer
Holt Integrated Circuits
Datasheet
PIN DESCRIPTIONS
SIGNAL
TXAOUT
TXBOUT
CWSTR
RIN1A
RIN1B
RIN2A
RIN2B
ENTX
TEST
BD15
BD14
BD13
BD12
BD11
BD10
BD09
BD08
BD07
BD06
BD05
BD04
BD03
BD02
BD01
BD00
TX CLK
D/R1
D/R2
TX/R
VDD
GND
RSR
EN1
EN2
NFD
CLK
HF1
HF2
SEL
HFT
FFT
FF1
FF2
PL1
PL2
MR
V+
V-
FUNCTION
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
POWER
POWER
POWER
POWER
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
+5V ± %
ARINC receiver 1 positive input
ARINC receiver 1 negative input
ARINC receiver 2 positive input
ARINC receiver 2 negative input
Receiver 1 data ready flag
FIFO full Receiver 1
FIFO Half full, Receiver 1
Receiver 2 data ready flag
FIFO full Receiver 2
FIFO Half full, Receiver 2
Receiver data byte selection (0 = BYTE 1) (1 = BYTE 2)
Data Bus control, enables receiver 1 data to outputs
Data Bus control, enables receiver 2 data to outputs if
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
0 V
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Latch enable for byte 1 entered from data bus to transmitter FIFO.
Latch enable for byte 2 entered from data bus to transmitter FIFO. Must follow
Transmitter ready flag. Goes low when ARINC word loaded into FIFO. Goes high
Transmitter FIFO Half Full
Transmitter FIFO Full
-9.5V to -12.6V
Line driver output - A side
Line driver output - B side
+9.5V to +12.6V
Enable Transmission
Clock for control word register
Read Status Register if SEL=0, read Control Register if SEL=1
No frequency discrimination if low (pull-up)
Master Clock input
Transmitter Clock equal to Master Clock (CLK), divided by either 10 or 80.
Master Reset, active low
Disable Transmitter output if high (pull-down)
after transmission and FIFO empty.
5
HOLT INTEGRATED CIRCUITS
HI-8582, HI-8583
DESCRIPTION
2
EN1
is high
PL1.

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