M470T6554CZ0 Samsung semiconductor, M470T6554CZ0 Datasheet - Page 14

• Manufacturer Part Number: M470T6554CZ0
• Description: DDR2 Unbuffered SODIMM
• Manufacturer: Samsung semiconductor

256MB, 512MB, 1GB Unbuffered SODIMMs
DQ and DM input
setup time
Control & Address
input pulse width for
each input
DQ and DM input
pulse width for each
input
Data-out high-
impedance time from
CK/CK
DQS low-impedance
time from CK/CK
DQ low-impedance
time from CK/CK
DQS-DQ skew for
DQS and associated
DQ signals
DQ hold skew factor
DQ/DQS output hold
time from DQS
Write command to first
DQS latching transition
DQS input high pulse
width
DQS input low pulse
width
DQS falling edge to
CK setup time
DQS falling edge hold
time from CK
Mode register set
command cycle time
Write postamble
Write preamble
Address and control
input hold time
Address and control
input setup time
Read preamble
Read postamble
Active to active
command period for
1KB page size
products
Parameter
Symbol
tDS(base)
tIPW
tDIPW
tHZ
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
tDQSL
tDSS
tDSH
tMRD
tWPST
tWPRE
tIH(base)
tIS(base)
tRPRE
tRPST
tRRD
2*tAC
tHP -
tQHS
-0.25
min
0.35
0.35
0.35
100
0.35
min
min
275
200
0.6
tAC
0.2
0.2
0.4
0.9
0.4
7.5
x
2
DDR2-667
x
x
max
0.25
max
max
max
tAC
tAC
tAC
240
0.6
1.1
0.6
340
x
x
x
x
x
x
x
x
x
x
x
x
x
2* tAC
tQHS
tHP -
-0.25
min
0.35
0.35
100
0.35
375
250
min
min
0.6
0.2
0.2
0.4
0.35
0.9
0.4
7.5
tAC
DDR2-533
x
2
x
x
max
0.25
max
max
max
tAC
tAC
tAC
300
400
0.6
1.1
0.6
x
x
x
x
x
x
x
x
x
x
x
x
x
2* tAC
tQHS
tHP -
-0.25
min
0.35
0.35
0.35
150
0.35
475
350
min
min
0.6
tAC
0.2
0.2
0.4
0.9
0.4
7.5
x
2
DDR2-400
x
x
max
max
max
max
0.25
tAC
tAC
350
450
tAC
0.6
1.1
0.6
x
x
x
x
x
x
x
x
x
x
x
x
x
Units
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
Rev. 1.1 Mar. 2005
DDR2 SDRAM